Subject: Re: more on the 400-series utility chip
To: mike smith <miff@spam.frisbee.net.au>
From: Herb Peyerl <hpeyerl@beer.org>
List: port-hp300
Date: 03/21/1997 07:07:54 
mike smith <miff@spam.frisbee.net.au>  wrote:
 > >     pic         base+0xe0
 > 
 > No details on this one? 8(

	picbase+0x0		upper interrupt enable reg.
        picbase+0x4		lower interrupt enable reg.
        picbase+0x8		upper interrupt pending reg (r/o)
        picbase+0xc		lower interrupt pending reg (r/o)
	picbase+0x10		unused
	picbase+0x14		unused
	picbase+0x18		interrupt vector register
	picbase+0x1c		interrupt ack (?)

oh, and:

as far as pio goes:

	piobase+0x0		parallel input register
	piobase+0x4		input polarity register
	piobase+0x8		input edge/level register