Subject: Re: Utility chip sio's on 4xx (more stories)
To: None <email@example.com>
From: Michael Smith <firstname.lastname@example.org>
Date: 03/21/1997 10:39:46
Michael Joosten stands accused of saying:
> Ho, so somebody else has had more time I ...
Dunno about that; I'm just really annoyed that something like this has
slipped for so long (heck, even the HPBSD didn't support this chip!).
> I've even tried to reengineer the hardware. Pin 3 of the DB25 goes
> (on a 400t !) to chip UY10, pin 6, a hex RS232 converter (3 in, 3
> out), whose output (pin 11) is connected to the 16550 and the
> Frodo. The output, though seems to go through some wired-or to pin
> 14, and then via pin 3 to DB25/pin 2. It is possible to wrie into
> dca addressland and get characters through while using Frodo port 1
> as console (Domain/OS monitor mode).
Ok, so it's just a case of keeping the other port quiescent, rather than
actually having to enable/disable a mux somewhere.
> According from the labels in /sau12/domain.map (Domain/OS 10.3),
> there is really no 2681 anymore, the DN3000/4000 SAUs have explicit
> SIO_2681 labels, but not SAU12/11 (for 400t/433t). What is the
> difference between 8250 and 16650 - is it just some sort of 16450 ,
> without fifos?
The 8250 is the original part in the family. The 16450 is basically
the same, but a little faster and more reliable at high speeds. The
16550 is faster again, and has 16-byte send and receive FIFOs.
It's my guess that the Frodo chip either contains some simplistic
UARTs that mimic the 8250 register model (quite likely), or possibly
even real, licensed 16x50 macrocells. Regardless, there is extra
stuff in there that I need to know about 8(
> Fifos: I can also recall having seen in an old archive of
> comp.sys.hp a refernece from some HP emplyee claiming that this chip
> has fifos. And even the strings in apollo_pci.o (HPUX module) claim
> that. But who knows...
Indeed. I'm working on finding out though 8)
> This is what I extracted from the archives:
There are lots of contradictions there 8)
> The 425e's three serial ports are the Apollo DN-series flavor, like the two
> extra ports on the other 400s. The first port (select code 9) is Apollo-
> style, and is NOT based on the Ns16550 used in the other 400s. Each has a
> max bit rate of 19200, no RTS, and an in/out FIFO of 1/8 bytes. They may
> not be suitable for "high speed" modems.
An 8-byte _output_ fifo? Obviously designed for terminals or printers?
> Perhaps it is possible to ask these persons if they still have some
> vague ideas about the Frodo chip.....
That'd be handy.
> Together with the hint (finally! I asked for more than a year for
> this info...) that it is located DIO + 0x1c000, I'm able to write
> into its registers and get stuff written on the line, great! So, its
> hardware/physical address is at 0x41c000.
Neat. I have a kernel waiting for me to get home and boot it. I got
sidetracked building another kernel and finding a disk and box (someone
stole the disk trays out of my 425 8( ) because I'm tired of waiting 5
minutes to load a kernel diskless.
> > There is (must be) a lot more than that in this chip. As already
> > observed, there is what appears to be a set of interrupt enables
> Indeed. The map file of Domain/OS says (written from notices, can't find the
> file now or is at home on a diskette):
> 7FBA8000 UTILITY_CHIP
> 8000 SIO_0
> 8020 SIO_1
> 8040 SIO_2
> 8060 SIO_3
All OK so far.
> 80A0 TIMER
Interesting! Timers are always nice.
> 80C0 UTIL_PIO
> 80C0 MMU_ISR (?? NOT SURE ??)
> 80E0 UTIL_PIC
> So, there is a timer, a PIO (who knows what for ?) and the interrupt control
I wonder if the PIO has something to do with the parallel port; I
pulled the driver for it apart but the base address appears to be
passed in from the system config; I would guess that someone with
HP/UX and and /etc/master could tell me where it's located. The
parallel port also appears to be DMA-capable, but a shade confusing.
> The timer apparently works liek a timer: once you write something
> into it, it counts:
> D 41C0A0 41C0AF
> 41C0A0: 74FF 91FF DAFF A3FF F3FF 63FF 00FF 00FF
> >D 41C0A0 41C0AF
> 41C0A0: 98FF 66FF 56FF D2FF 57FF FCFF 00FF 00FF
> >D 41C0A0 41C0AF
> 41C0A0: 04FF 94FF BAFF 1DFF ACFF 42FF 00FF 00FF
> What surprises me bit is that the old DN3000/400 boards have a also
> a 6840 as timer chip, but here it seems that even regs 0&1 are timer
> readouts, wereas regs 7&8 are rather latches (you read back what you
> wrote in). Thought that reg 0&1 are control regs for 6840 ?!
They didn't bother emulating the 2681, why go with the 6840? More
interestingly, perhaps, can the timer generate interrupts?
> The port cannot identify itself just as other HP cards (or better pseuso
> cards), as the do not have the special space in the first 16 bytes of their
> address space, as the dca, SCSI and lance devices have (though they are
> builtin). Perhaps just testing for a writable address somewhere might be
This is the approach I've taken with my 'apci' driver. I was planning to
add some extra 8250-aware probing once I knew how to generate and check
> > clock frequency
> Perhaps reengineer? It is prob. not more than 19200 baud possible, together
> with the divider table hopefully in apollo_pci.o one could perhaps deduce the
> proper clock freq.
Slow is fine; my primary goal is just to get the Apollo keyboard talking.
Finding the ISA slot would be a winner too (anything in the apollo info
that you have there?)
> Driver ideas: As I said, Domain/OS seems to address the Frodo ports just as
> 16550. So, nothing seems to prohibit us to reuse all the dca code.
I looked fairly hard at this, but unfortunately there are quite a few
assumptions about the dca embedded in the driver (specifically, its
> What is open is how to integrate this into the boot code and to
> check for the proper console. The later seems to be recorded in the
> monitors EEPROM.
Checking the monitor PROM is almost certainly the right way to go.
> Perhaps he can
> give us his code or hints how to switch between raw key events,
> mouse reports and ASCII. Looks like the default after reset is just
> ASCII keyboard plus stuff once the mouse is moved.
We have access to documentation on the Apollo keyboard protocol, so once
the port is working and generating interrupts it's a SMOP.
> Finally ! the stone is rolling ! Michael
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