Subject: Re: How to implement PSC driver on Au1550
To: Garrett D'Amore <garrett_damore@tadpole.com>
From: Martin Husemann <martin@duskware.de>
List: port-evbmips
Date: 02/23/2006 18:35:37
Here is what PCI_CONFIG_DUMP had to say about the wi0 card
Martin
io space, memory space enabled
wi0 at pci0 dev 0 function 0: PCI configuration registers:
Common header:
0x00: 0x38731260 0x02900347 0x02800001 0x0000fc00
Vendor Name: Intersil (0x1260)
Device Name: PRISM2.5 Mini-PCI WLAN (0x3873)
Command register: 0x0347
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: on
Address/data stepping: off
System error (SERR): on
Fast back-to-back transactions: on
Status register: 0x0290
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: network (0x02)
Subclass Name: miscellaneous (0x80)
Interface: 0x00
Revision ID: 0x01
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0xfc
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0x20000008 0x00000000 0x00000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x38731260
0x30: 0x00000000 0x000000dc 0x00000000 0x00000100
Base address register at 0x10
type: 32-bit prefetchable memory
base: 0x20000000, size: 0x00001000
Base address register at 0x14
not implemented(?)
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x1260
Subsystem ID: 0x3873
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0xdc
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x01 (pin A)
Interrupt line: 0x00
Capability register at 0xdc
type: 0x01 (Power Management, rev. 1.0)
Device-dependent header:
0x40: 0x00008080 0x00000000 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x7e020001
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
Intersil PRISM2.5 Mini-PCI WLAN (miscellaneous network, revision 0x01) at ? dev 0 function 0 (intrswiz 0, intrpin 0x1, i/o on, mem on, no quirks): can't map mem space