--qqDAixNol5
Content-Type: text/plain; charset=us-ascii
Content-Description: message body text
Content-Transfer-Encoding: 7bit

>>>>> "Izumi" == Izumi Tsutsui <tsutsui@ceres.dti.ne.jp> writes:

    Izumi> I've uploaded a test kernel which includes some random
    Izumi> patches in my local tree:
    Izumi> http://www.ceres.dti.ne.jp/~tsutsui/netbsd/netbsd-COBALT_TEST-20060510.gz
    Izumi> [...]
    Izumi> I'm not sure if these changes could fix any problem
    Izumi> reported before, but if you find any better (or worse)
    Izumi> behaviors with this kernel than -current stock kernel [...]
    Izumi> , please let me know with your kernel console logs. ---

First many thanks for this effort!

... especially as your patches seem to improve my qube2's stability
and performance! :-))

I was still observing some system hangups under heavy (network) load,
which I cannot reproduce _with_ these patches.

Network traffic seems to be zippier: Simple 'rsh ...' connections
seems to react more promptly. With ttcp and 32k buf len ('-l 32768') I
can reach tcp transfer rates up to 2.4 MBytes/sec (before only up to 1
MBytes/sec).

Dmesg output of my customized kernel with your patches is appended
(couldn't use your compiled one due to missing features (pppoe0, ral0
et al.)). If you need more verbose kernel output tell/mail me the
needed kernel compile options you need for getting it.

Thanks again, Markus.


--qqDAixNol5
Content-Type: text/plain
Content-Description: Qube2 Tsutsui Patch 20060510 dmesg
Content-Disposition: inline;
	filename="dmesg.cobat-tsutsi-patch-20060510"
Content-Transfer-Encoding: 7bit

Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
    The NetBSD Foundation, Inc.  All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
    The Regents of the University of California.  All rights reserved.

NetBSD 3.99.19 (COCHISE) #0: Sun May 14 17:36:28 MEST 2006
	kilbi@qie:/usr/src/sys/arch/cobalt/compile/COCHISE
Cobalt Qube 2
total memory = 256 MB
avail memory = 246 MB
mainbus0 (root)
com0 at mainbus0 addr 0x1c800000 level 3: st16650a, working fifo
com0: console
cpu0 at mainbus0: QED RM5200 CPU (0x28a0) Rev. 10.0 with built-in FPU Rev. 10.0
cpu0: 32KB/32B 2-way set-associative L1 Instruction cache, 48 TLB entries
cpu0: 32KB/32B 2-way set-associative write-back L1 Data cache
mcclock0 at mainbus0 addr 0x10000070: mc146818 compatible time-of-day clock
panel0 at mainbus0 addr 0x1f000000
gt0 at mainbus0 addr 0x14000000
GT_PCI_TIMEOUT_RETRY=0x0000070f
GT_PCI_TIMEOUT_RETRY=0x00ffffff
pci0 at gt0
pci0: i/o space, memory space enabled, rd/line, wr/inv ok
pchb0 at pci0 dev 0 function 0: Galileo GT-64111 System Controller, rev 1
tlp0 at pci0 dev 7 function 0: DECchip 21143 Ethernet, pass 4.1
tlp0: interrupting at cpu int 1
tlp0: Ethernet address 00:10:e0:00:74:62
lxtphy0 at tlp0 phy 1: LXT970 10/100 media interface, rev. 3
lxtphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
pcib0 at pci0 dev 9 function 0
pcib0: VIA Technologies VT82C586 PCI-ISA Bridge, rev 39
viaide0 at pci0 dev 9 function 1
viaide0: VIA Technologies VT82C586 (Apollo VP) ATA33 controller
viaide0: bus-master DMA support present
viaide0: primary channel configured to compatibility mode
viaide0: primary channel interrupting at irq 14
atabus0 at viaide0 channel 0
viaide0: secondary channel configured to compatibility mode
viaide0: secondary channel interrupting at irq 15
atabus1 at viaide0 channel 1
VIA Technologies VT83C572 USB Controller (USB serial bus, revision 0x02) at pci0 dev 9 function 2 not configured
ral0 at pci0 dev 10 function 0: irq 9
ral0: MAC/BBP RT2560 (rev 0x04), RF RT2525, address 00:80:5a:36:76:fc
ral0: 11b rates: 1Mbps 2Mbps 5.5Mbps 11Mbps
ral0: 11g rates: 1Mbps 2Mbps 5.5Mbps 11Mbps 6Mbps 9Mbps 12Mbps 18Mbps 24Mbps 36Mbps 48Mbps 54Mbps
tlp1 at pci0 dev 12 function 0: DECchip 21143 Ethernet, pass 4.1
tlp1: interrupting at cpu int 2
tlp1: Ethernet address 00:10:e0:00:86:b3
lxtphy1 at tlp1 phy 1: LXT970 10/100 media interface, rev. 3
lxtphy1: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
IPsec: Initialized Security Association Processing.
wd0 at atabus0 drive 0: <SAMSUNG SV1604N>
wd0: drive supports 16-sector PIO transfers, LBA48 addressing
wd0: 149 GB, 310101 cyl, 16 head, 63 sec, 512 bytes/sect x 312581808 sectors
wd0: 32-bit data port
wd0: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 5 (Ultra/100)
wd0(viaide0:0:0): using PIO mode 4, Ultra-DMA mode 2 (Ultra/33) (using DMA)
boot device: wd0
root on wd0a dumps on wd0b
root file system type: ffs

--qqDAixNol5--