Some of the processors will allow you to make it write-trough instead of 
write-back. I am not sure if the cube is of that variety but I think it 
is not. Although I dont know if that would help.
The closest thing to disabling cache would be to allocate buffers for 
suspected operation from Kseg1 segment which is uncached. Unfortunately 
I dont think it is possible as this memory also unmapped which would 
kill its use in user space. Although it might be possible to setup some 
specific test with hacked kernel just to find this bug.

Is that a bad idea ?

Alex

Simon Burge wrote:
> Markus W Kilbinger wrote:
> 
> 
>>Isn't it possible to turn the cache off just for testing purposes,
>>just to see if the problem is still present then?
> 
> 
> In general you can't turn off the L1 cache on MIPS chips.  Certain CPU
> cores allow you to play with the size of the L1 cache, including totally
> disabling it (an implemetation of the MIPS 4Kc comes to mind), but this
> ability is rare.
> 
> Simon.
> --
> Simon Burge                            <simonb@wasabisystems.com>
> NetBSD Support and Service:         http://www.wasabisystems.com/
> 
> 
>