In article <20050213131857.GA4659@spathi.chuq.com>
chuq@chuq.com wrote:

> I don't see this problem on my R4400 pmax 5000/260, so it's likely specific
> to either the RM5200/R5000 or systems with no L2 cache.  do RM5200/R5000
> systems with L2 cache (eg. sgimips) see this?  do we support any other
> MIPS variants with no L2 cache?  maybe some of the hpcmips doodads?

My R5000 O2 with enabled L2 cache also has the same problem.
I guess there is something wrong around r5k cache code
but I can't find any particular problem in cache_r5k.c
when I looked at (but I could be wrong).
---
Izumi Tsutsui
tsutsui@ceres.dti.ne.jp