Subject: Re: hardclock(9) for cobalt
To: None <port-cobalt@netbsd.org>
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
List: port-cobalt
Date: 08/12/2004 04:00:52
In article <20040811.023752.74752917.kiyohara@kk.iij4u.or.jp>
kiyohara@kk.iij4u.or.jp wrote:
> > Maybe we should attach the timer as usual device and initialize
> > it in the attachment, and functions which enable the timer that
> > will be called from cpu_initclocks(9) should also be registered
> > in the attachment (like mvme68k or news68k ;-).
>
> How is it now?
>
> gttmr0 at mainbus0: 32bit-Wide Timer/Counter on GT-64111
With a quick glance, I still have some requests for completeness.
(yes, maybe I'm a paranoid ;-)
- gttmr should be attached at gt0 rather than mainbus0.
- gttmr.c should use bus_space(9) functions rather than
MIPS_PHYS_TO_KSEG1(). I guess some GT64xxx devices are
also used by some evbppc.
(In this case, INTR_CAUSE register can't be mapped here,
so we have to have a function to access it in gt.c??)
- Register definitions (like TIMER_COUNT_0 etc.) should be in
some header file.
(cobalt/dev/gt64111reg.h, or sys/dev/ic/gt64111reg.h eventually?).
- I think cpu_initclocks() should call timer_enable() via some
function pointer which is initialized in gttmr_attach().
(maybe we should have some MI API for the timer, like todr(9))
> microtime(9) uses timer0.
> Probably, it will be better to add microtime(9) here, if possible.
IMO, it's better to use function pointer to read counter, like pmax.
Cobalt port doesn't have/require "struct platform", so maybe
it's enough to prepare one global pointer for it.
---
Izumi Tsutsui
tsutsui@ceres.dti.ne.jp