Izumi Tsutsui said;

> Because timers are started (or timer interrupts are enabled or established)
> in cpu_initclocks(9) (which is called from initclocks() after
> softclock_si is initialized) on other ports.
> (or no generic soft interrupts on some ports?)

You are not aware of the fact some ports are unable to configure RTC clock
feed.  With this specific hardware, one of Galileo GT64000 series PCI host
bridge,  kernel programmers are allowed to reprogram RTC clock, but
some clock source are hardwired, no way other than to enable master
interrupt gate.

There is much room to improve cobalt port.  It's somehow surprising
to see very little work has been done on GT reprogramming.  At very least
a small effort should be done to make the GT sane state before enabling
IE bit of SR.  GT has three 24bit timer/counter as well as 32bit timer/counter,
and Mulitple DMA channels.  These hardware are under-ultilized.

Toru Nishimura/ALKYL Technology