Subject: Re: Bootloader problems
To: Reinoud Zandijk <imago@kabel065011.kabel.utwente.nl>
From: Chris Gilbert <chris@paradox.demon.co.uk>
List: port-arm32
Date: 04/13/2001 14:14:10
On Friday 13 April 2001  1:15 pm, Chris Gilbert wrote:
> Hi Reinoud,
>
> I've just got around to installing the new bootloader on my RPC.  However
> I've found a problem, it seems to slow the whole machine done, as part of
> the new delay code I calibrate a loop, on the new bootloader it gets:
> clock0: 100000 loops in 19205 microseconds, delay factor = 6
> on the old one it was getting:
> clock0: 100000 loops in 1786 microseconds, delay factor = 79

Doh, typo I meant 1286 microseconds...

> Pipe Bandwidth is down with the new code:
> it was 7.82 Mb/s, it's now 5.98 MB/s
>
> And to really scare me lmbench reports that the Mhz is:
> 65 MHz, 15.38 nanosec clock
>
> Normally it says it's 231 (it's should actually be 233, but I guess
> interrupts get in the way of the timing or something)
>
> Anyway, I'm not sure where to start looking into this problem, I've looked
> over rpc_machdep, and can't spot anything obviously wrong in it, all I can
> think of is that the kernel isn't being placed in cacheable memory, or the
> memory isn't flagged as cacheable.

Managed to find the problem, we don't enable clockswitching in the kernel 
(something that we probably should do)  So when the bootloader disables it, 
we don't reenable it, so the clock speed drops back down to the bus interface 
clock speed on the first cache miss, ouch, probably worse on a real sa, this 
being a kinetic the memory is clocked higher (hence lmbench seeing 66MHz)

Anyway workaround is to comment out the EQUD on line 809 or search for 
clockswitching (809 being real lines, not basic lines ;)

Someone should look into the fact we don't enable clockswitching, see if it's 
just the SA110 that has it or if others (eg SA11x0 do).  I'll do so at some 
point as it certainly effects me (and there's nothing like that as an 
incentive)

Cheers,
Chris