Subject: Re: Port of NetBSD to XScale
To: None <Richard.Earnshaw@arm.com>
From: Charles M. Hannum <root@ihack.net>
List: port-arm32
Date: 03/29/2001 11:42:40
On Thu, Mar 29, 2001 at 11:08:13AM +0100, Richard Earnshaw wrote:
> > 
> > On Thu, Mar 29, 2001 at 09:17:52AM +0100, Chris Gilbert wrote:
> > > 
> > > Branching looks to be worse than ever at 4 cycle for a branch miss, or 0 if 
> > > it's predicted by the branch prediction buffer, it doesn't see the standard 
> > > MOV PC, LR to return method, I suspect that doing B LR will help it there.
> > 
> > Er, are you saying `mov pc, lr' always causes a 4-cycle stall?  That
> > would an *amazing* f*ck*p.  Wow.
> 
> According to the documentation I have, Xscale only predicts B and BL 
> instructions, both of which only have pc-relative invariant offsets.  Any 
> mis-predicted (or unpredicted) branch takes at least 5 cycles to issue (8 
> if the value has to come from memory). [XScale Developers Manual, Table 
> 14-4]

So a function return always takes 5 clock cycles??  Was this thing
developed by the same group that did the P4, perchance??