> In the CPU specific routines in cpufunc_asm.s, there is a conditional for
> CPU_SA110 and then there is another conditional for CACHE_CLEAN_BLOCK_INTR.
> The code appears to just be disabling interrupts, but I can't determine what
> conditions define CACHE_CLEAN_BLOCK_INTR.   It looks like it is trying to
> block interrupts, or have a user mode flag to prevent user space access.
> Any ideas?
> Kyle
> 

It's a while since I looked at this, so I'm going mostly by memory.  IIRC 
my suspicions at the time were that it was some experimental code that was 
never garbage collected.

It would be *really horrible* hit on performance and interrupt latency if 
SA chips had to disable interrupts while cleaning the cache.

R.