Subject: CACHE_CLEAN_BLOCK_INTR
To: 'port-arm32@netbsd.org' <port-arm32@netbsd.org>
From: Unice, Kyle <kyle.unice@intel.com>
List: port-arm32
Date: 02/02/2001 13:59:09
In the CPU specific routines in cpufunc_asm.s, there is a conditional for
CPU_SA110 and then there is another conditional for CACHE_CLEAN_BLOCK_INTR.
The code appears to just be disabling interrupts, but I can't determine what
conditions define CACHE_CLEAN_BLOCK_INTR.   It looks like it is trying to
block interrupts, or have a user mode flag to prevent user space access.
Any ideas?
Kyle

W. Kyle Unice
Senior Software Engineer                 Email: kyle <dot> unice <at>
intel.com
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