Philip Blundell <pb@nexus.co.uk> writes:
>This is a general problem with any ARM system actually; it's not specific to 
>the SA-110 or 21285.  There is no provision for keeping the cache coherent in 
>hardware so you have to take care of it in software.  So long as the OS is 
>careful it should be no big deal.
> 
>A few other cpus (MIPS springs to mind) have the same kind of issues.

... and this set of issues is one of the reasons why NetBSD has grown
the bus_dma* set of interfaces.  8-)

(looking at the NetBSD NCR 53c8xx and PCI LANCE drivers, it looks like
they do the right things to assure that the memory used by DMA will be
accessed in a DMA-safe manner...)


cgd
-- 
Chris Demetriou - cgd@netbsd.org - http://www.netbsd.org/People/Pages/cgd.html
Disclaimer: Not speaking for NetBSD, just expressing my own opinion.