> On Sat, Dec 12, 1998 at 11:47:00AM +0000, Richard Earnshaw wrote:
> > Yes it does, but you need egcs for this:
> >   gcc -O2 -mtune=strongarm
> > 
> > You need -O2 to turn on the scheduler pass, and -mtune=strongarm to tell 
> > it to tune the code for a strongarm.
> 
> Does this penalize the RiscPC?

I assume you mean a RiscPC without a strongarm.  Possibly but only 
slightly, scheduling the instructions can increase register pressure, 
which can increase the number of registers that have to pushed onto the 
stack at the start of each function.  The cost of doing this is normally 
recovered by the avoidance of load stalls in the body of the function, but 
this benefit is not available on the earlier ARMs so you have to pay the 
cost, but get no benefit in these circumstances.

Creating a good instruction schedule is a black art, so even on the 
strongarm it may pay to experiment with the scheduling options if you 
really want to squeeze the final bit of Ommph out of your cpu.

Richard.