Subject: Re: Random core dumps, more data
To: None <port-arm32@netbsd.org>
From: Charles M. Hannum <root@ihack.net>
List: port-arm32
Date: 12/03/1998 17:23:20
Mark:
>   There should not be any I cache sync issues with the PLT's. The very
> first iteration of them (pre-dates integration) used to sync each jmpslot
> when it was modifed but this was unacceptable from the performance angle. 

This was changed some time in August.  (Yah, yah, so I did it.)  I
changed it back, and indeed I don't get core dumps any more.

HOWEVER, there is clearly a bug here, and I'm not going to just let it
slide by changing ld.so!!!

Neil:
> I take your point about reentrant jumpslots. Could it be possible at the
> moment for an alarm signal to be delivered in the midst of a jumpslot
> fillout which could cause a trash if reentrance is required?

No, that's not possible.  The PLT slot in the core dump has been fully
updated, but nevertheless the pc is clearly in the wrong place.  (You
can see in most of the core dumps that the pc is obviously the address
of the PLT slot plus the address of the function.)  It might be
possible for the slot to be fully updated but for the I cache flush to
have not been done yet when a signal is taken; however, in that case
there would be a signal trampoline on the stack, and there isn't.

It's pretty clear that the I cache flushes are simply not working
correctly.