Charles M. Hannum wrote:

> I'm not sure about the ES1887, but I believe some devices will prefill
> their FIFO and then stop transferring until you acknowledge the
> interrupt.  So it's possible that you only have ~1.45ms (256/176400s)
> to acknowledge the interrupt without getting a glitch.

> Anyway, I'll look at it when I decide to boot the Shark again.  B-)

I'd reckon that the _mean_ latency will be significantly less than this.
Latency will presently be bad when doing a bus-dma presync, or when
doing a context switch. As an experiment, you could try running say one
of lmbench's context switch benchmarks, and playing audio at the same
time and see if things get noticably worse.

-- 
Neil A. Carson