Subject: Re: RiscBSD speed
To: None <sol@Space.WH1.TU-Dresden.De>
From: Chris Gilbert <cg110@york.ac.uk>
List: port-arm32
Date: 06/18/1997 11:40:01
sol@Space.WH1.TU-Dresden.De wrote:

<snip timings>
 
> It is much worse that context switching, communication latencies and
> bandwiths are very bad compared with other systems. Sometimes the Arm610
> is faster than the Strongarm, I guess this is because of cache flushing
> or even switching off on Strongarm.

This is because the pmap'ing routines are based on the i386 ones (I
think) originally, also the arm6 and arm7 chips use a write-back method
for the cache, however the SA uses write-through, this causes many
problems.  The other obvious place being the seperate caches for
instruction and data cache.  I think mark is working on these routines
as I'd think some company is wanting them done.  I think that the speed
up would be quite suprising, it takes about 30-40 minutes to compile a
kernel on riscbsd (IIRC) and armlinux claims to take about 20 minutes,
armlinux started supporting the SA first so probably has better cache
control.
 
> But also the Arm610 is not too fast, it is even very slow, and there is
> not always the cache flushed or switched off. So my question is: is this
> because RiscBSD is not very optimized (so this could become better some
> day) or is it because of some other reason?

The problem maybe that we don't have shared libraries yet, so every
process switch causes more memory pointers to be moved around (I think)
with shared libs less needs to be used per process.  These have been
done but are awaiting the legal bits to be signed, so that they can be
released.

Chris