The ARM1136 has three new coprocessor 32-bit (of coures) registers for storing 
thread and process information.

They are user read/write, user read/only, and privileged-only read/write.

Obviously the user-visible ones need to dealt with on a context switch. But the 
problem is cf_context_switch doesn't anywhere to store the user readwrite 
register (it only gets passed the L1 page table ptr).  It doesn't seem smart to 
store/restore it on user exceptions since it'll only change on context switches. 
  Since r4 stores the old lwp, I'm thinking of using that register to store it 
in mdlwp.

For the user readonly register, I would also keep that in mdlwp and restore it 
in cf_context_switch.  But I'm not sure what user space would make it.  I'd 
allow a user to store a value in it via sysarch(ARM_SET_USERID, value).

The priviled register could store either curcpu or curlwp.  Normally I'd lean 
towards curcpu but I could argued to store curlwp.  curcpu means that it only
has to be loaded one.  curlwp would require it to be updated in cf_context_switch.

Comments?  Suggestions?