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Hi! all,


PXA255 (and PXA26X) has HWUART.  However it isn't define HWUART (and NSSP)
registers and IRQs at pxa2x0reg.h.  We need for this defines.

Thanks,
--
kiyohara


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Index: arm/xscale/files.pxa2x0
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/files.pxa2x0,v
retrieving revision 1.9
diff -u -r1.9 files.pxa2x0
--- arm/xscale/files.pxa2x0	11 Dec 2005 12:16:51 -0000	1.9
+++ arm/xscale/files.pxa2x0	3 Dec 2006 11:24:48 -0000
@@ -33,7 +33,8 @@
 file arch/arm/xscale/pxa2x0_com.c		pxauart
 file arch/arm/xscale/pxa2x0_a4x_space.c		pxauart | obio
 file arch/arm/xscale/pxa2x0_a4x_io.S		pxauart | obio
-defflag	opt_com.h	FFUARTCONSOLE STUARTCONSOLE BTUARTCONSOLE
+defflag	opt_com.h			FFUARTCONSOLE STUARTCONSOLE
+					BTUARTCONSOLE HWUARTCONSOLE
 
 # clock device
 # PXA2x0's built-in timer is compatible to SA-1110.
Index: arm/xscale/pxa2x0_com.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/pxa2x0_com.c,v
retrieving revision 1.6
diff -u -r1.6 pxa2x0_com.c
--- arm/xscale/pxa2x0_com.c	13 Jul 2006 22:56:00 -0000	1.6
+++ arm/xscale/pxa2x0_com.c	3 Dec 2006 11:24:48 -0000
@@ -90,6 +90,11 @@
 			return (0);
 		break;
 
+	case PXA2X0_HWUART_BASE:
+		if (pxa->pxa_intr != PXA2X0_INT_HWUART)
+			return (0);
+		break;
+
 	default:
 		return (0);
 	}
Index: arm/xscale/pxa2x0reg.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/pxa2x0reg.h,v
retrieving revision 1.9
diff -u -r1.9 pxa2x0reg.h
--- arm/xscale/pxa2x0reg.h	10 Apr 2006 04:13:58 -0000	1.9
+++ arm/xscale/pxa2x0reg.h	3 Dec 2006 11:24:49 -0000
@@ -111,6 +111,7 @@
 #define PXA2X0_MMC_SIZE		0x48
 #define PXA2X0_CLKMAN_BASE  	0x41300000 /* Clock Manager */
 #define PXA2X0_CLKMAN_SIZE	12
+#define PXA2X0_HWUART_BASE	0x41600000 /* Hardware UART */
 #define PXA2X0_LCDC_BASE	0x44000000 /* LCD Controller */
 #define PXA2X0_LCDC_SIZE	0x220
 #define PXA2X0_MEMCTL_BASE	0x48000000 /* Memory Controller */
@@ -129,12 +130,13 @@
 /* width of interrupt controller */
 #define ICU_LEN			32   /* but [0..7,15,16] is not used */
 #define ICU_INT_HWMASK		0xffffff00
-#define PXA250_IRQ_MIN 8	/* 0..7 are not used by integrated 
+#define PXA250_IRQ_MIN 7	/* 0..6 are not used by integrated 
 				   peripherals */
 #define PXA270_IRQ_MIN 0
 
 #define PXA2X0_INT_USBH1	3	/* USB host (OHCI) */
 
+#define PXA2X0_INT_HWUART  	7
 #define PXA2X0_INT_GPIO0	8
 #define PXA2X0_INT_GPIO1	9
 #define PXA2X0_INT_GPION	10	/* irq from GPIO[2..80] */
@@ -142,6 +144,7 @@
 #define PXA2X0_INT_PMU  	12
 #define PXA2X0_INT_I2S  	13
 #define PXA2X0_INT_AC97  	14
+#define PXA2X0_INT_NSSP  	16
 #define PXA2X0_INT_LCD  	17
 #define PXA2X0_INT_I2C  	18
 #define PXA2X0_INT_ICP  	19
@@ -255,10 +258,12 @@
 #define CKEN_PWM1	(1<<1)
 #define CKEN_AC97	(1<<2)
 #define CKEN_SSP	(1<<3)
+#define CKEN_HWUART	(1<<4)
 #define CKEN_STUART	(1<<5)
 #define CKEN_FFUART	(1<<6)
 #define CKEN_BTUART	(1<<7)
 #define CKEN_I2S	(1<<8)
+#define CKEN_NSSP	(1<<9)
 #define CKEN_USBH	(1<<10)
 #define CKEN_USB	(1<<11)
 #define CKEN_MMC	(1<<12)

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