On Tue, 04 Jan 2005 10:07:44 PST, "Kamal R. Prasad" wrote:

> I believe the system hangs only after the TLB is
> invalidated. So it isn't a problem of interrupts
> (AFAIK). I notice that the lubbock code in netbsd sets
> the TLB base addr as 0xa01fc000, but isn't TLB base
> addr something that points to the hardware cache?
> =


The Translation Table Base register (TTB) needs to contain the *physical*=
 =

address of the L1 page table (obvious if you think about it for a moment)=
=2E =

 This must be a *16k* aligned block of 4 pages of memory.

R.