> > 
> > The PTE check is actually checking for the 'copy on write' case,
> > not the 'page not present' case.  This may have something to do
> > with the problems Jason? was having with COW on XSCALE.
> > My guess is that the cpu wasn't faulting the write to cache! Just the
> > writeback of the cacheline - which would be asynchonous! 
> 
> Further thoughts:
> 
> 1) if this check is needed here, presuambly there are equivalent
>    problems for COW for writes from user space?

I think the code is written the way it is because the ARM pte mappings 
require that user-read => kernel-write.  However, ldrt would solve that 
problem.

> 2) is address space reserved for PTE entries for the entire user
>    address space?

yes and no.  L1 space is allocated (4 pages), but L2 space is only 
allocated if there are mappings in that region.

R.