Chris Gilbert <chris@paradox.demon.co.uk> writes:

[...]

> The ptpt's have to be accessible to the kernel, so it can manipulate
> the pte's, so they have a kernel VA. (see pmap_allocpagedir) But
> they're also always at the same VA in the processes L1 table, so
> that if you're in the context of the process you can manipulate
> them.
> 
> I think in theory given the ptpt you can potentially rebuild the
> whole of the L1 table.

You forget sections. If we threw out the ptpt stuff we would have to
handle them more fully, as a result it would be a smaller step to get
to be able to map things with sections.

> The whole thing is messy really, I still don't fully understand it,
> and need to write bits of all this up, so that it all makes sense to
> me.

Or just start again from scratch, that way you figure out pretty quick
why things are as they are, in my experience :-)


[...]

> Well you should have an L1 pt of 16k, and then 1 page for the ptpt,
> which has to be self mapping.  The L1 should have entries for the
> kernel's L2 pt's and the ptpt at va PROCESS_PAGE_TBLS_BASE.  But yes
> the rpc should do most of this (albeit not very clear).

Indeed. That PGSHIFT << 2 business completely threw me.

-- 

	http://ape.n3.net