On Sun, Nov 12, 2000 at 01:28:56AM +0100, Ralf Baechle wrote:
> On Sat, Nov 11, 2000 at 09:24:30AM -0500, Mark Abene wrote:
> 
> > While we're on the subject of deviations...  Ralf, the linux kernel currently
> > makes the assumption that the MCT ADR interrupt source and enable registers
> > are at 0xe0010000/2.  On the Pica/Olivetti/Magnum, they're at 0xe0040000/2.
> > I at least verified this on the Magnum, and others on the list can vouch for
> > the Pica and Olivetti.
> 
> These are mapped addresses so I don't see the need why the should be the
> same?
> 
>   Ralf

I assumed the physical i/o space at 0x80000000 was mapped on a one-to-one
basis to the virtual 0xe0000000 i/o space.  If that's the case, the interrupt
source register is at 0xe0040000, not 0xe0010000.  Both ARC and RISC/OS prove
this to be the case.

-Mark