Subject: Re: trap: TLB miss in -current
To: None <mk2s@digitalcommute.com>
From: Noriyuki Soda <soda@sra.co.jp>
List: port-arc
Date: 06/15/2000 17:24:59
> I'm getting trap: TLB miss (load or instr. fetch) in kernel mode.  This has 
> been happening since my cvs update this evening.  Does anyone know why?

Thanks for reporting.

Could you know the date of last working kernel?
Also, Could you provide the symbols names and disassemble result
around address 0x801e6a0c?

> NetBSD 1.4ZD (M700) #5: Wed Jun 14 23:52:34 EDT 2000
>     root@netbsd2:/usr/src/sys/arch/arc/compile/M700
> Olivetti M700-10

"Olivetti M700-10"?
Mmm, interesting, it seems this one is just same with MAGNUM.
Is this right? . Could you send me the patch for this?
--
soda