Re: Problems with IOblix serial ports

[John Klos <john%ziaspace.com@localhost>]

> Thanks. You may want to try the following patch:
>
> Index: comreg.h
> ===================================================================
> RCS file: /cvsroot/src/sys/dev/ic/comreg.h,v
> retrieving revision 1.15
> diff -u -r1.15 comreg.h
> --- comreg.h    28 Apr 2008 22:00:01 -0000      1.15
> +++ comreg.h    27 May 2010 10:22:41 -0000
> @@ -98,6 +98,7 @@
> #define        LCR_5BITS       0x00    /* 5 bits */
>
> /* modem control register */
> +#define MCR_PRESCALE   0x80    /* 16650/16950: Baud rate prescaler select */
> #define MCR_TCR_TLR    0x40    /* OMAP: enables access to the TCR & TLR regs */
> #define MCR_XONENABLE  0x20    /* OMAP XON_EN */
> #define        MCR_LOOPBACK    0x10    /* Loop test: echos from TX to RX */
> Index: com.c
> ===================================================================
> RCS file: /cvsroot/src/sys/dev/ic/com.c,v
> retrieving revision 1.297
> diff -u -r1.297 com.c
> --- com.c       19 Apr 2010 18:24:26 -0000      1.297
> +++ com.c       27 May 2010 10:23:03 -0000
> @@ -465,6 +465,8 @@
>                                        sc->sc_fifolen = 0;
>                                } else {
>                                        SET(sc->sc_hwflags, COM_HW_FLOW);
> +                                       SET(sc->sc_mcr, MCR_PRESCALE);
> +                                       sc->sc_frequency *= 4;
>                                        sc->sc_fifolen = 32;
>                                }
>                        } else
> @@ -1477,8 +1479,8 @@
>                KASSERT(sc->sc_type != COM_TYPE_AU1x00);
>                KASSERT(sc->sc_type != COM_TYPE_16550_NOERS);
>                /* no EFR on alchemy */
> -               CSR_WRITE_1(regsp, COM_REG_EFR, sc->sc_efr);
>                CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS);
> +               CSR_WRITE_1(regsp, COM_REG_EFR, sc->sc_efr);
>        }
>        if (sc->sc_type == COM_TYPE_AU1x00) {
>                /* alchemy has single separate 16-bit clock divisor register */

Thank you, Frank. This didn't work as is; it seems that we want to 
divide sc_frequency by four, not multiply by four (we set 38400, we get 
9600), so changing the *= to /= made it work.

Next...

cu: unsupported speed 230400
reva: {4} cu -f -l /dev/ttyC0 -s 115200
cu: unsupported speed 115200
reva: {5} cu -f -l /dev/ttyC0 -s 57600
cu: unsupported speed 57600

Thanks!
John