Hi Aymeric,

In article <wnhlm1wpsw8.fsf@phantom.labri.u-bordeaux.fr>,
	Aymeric.Vincent@labri.fr (Aymeric Vincent) writes:

> The memory is split just to avoid overwiting the AmigaOS' MMU tables,
> right?

yes. if you inspect the boot loader, you'll note that it has to copy down
the kernel into it's final destination while the MMU is still up, else
it would have to find the physical addresses of the kernel... which is
possibly split...

(Hm - now that we have a two-stage bootloader, this might even be possible.
 I should investigate this.)

> But anyway, if the DraCo is the only Amiga with no memory around PA
> zero, I suggest we make a special case for it.
> Its case is easier to handle because 0x40000000 is very far from 0,
> and we can thus use the transparent translation registers to fake a
> PA == VA segment where the kernel is (they only have a 16MB
> granularity) just for the very few cycles when we enable the MMU.

This sounds good. The DraCo is guaranteed to have at least a 68040V CPU
(thats a CMOS 68LC040), which uses the same ITTR + DTTR format and registers
as the 68060. Actually, I'm using the same method to switch _off_ 
the MMU at reboot time! Just use my code backwards ;-)

> I can write the code for that tomorrow if you think it's fine.

Make it so. I'll test on DraCo, and 68040 Amiga. (I don't really want to
pull out the accellerator to test on 68030 Amiga, though).

Regards,
	Ignatios