Le 02/06/2015 11:24, deco33000%yandex.com@localhost a écrit :
Hello, What is the rationale for those values : #define NKL3_KIMG_ENTRIES 1 #define NKL2_KIMG_ENTRIES 32 Why 32 level 2 entries? Why only one pt3 entry ?
Those entries are the ones reserved for loading kernel beyond KERNBASE at boot in memory.
For amd64, each level can store 512 entries of a lesser level for the V2P mappings used by the MMU (64 bits => 8 bytes for one entry with a page size of 4096 bytes).
1 L1 entry maps 2MiB of virtual memory (512 entries * 4096 bytes). 32 L2 entries maps 32 * 2MiB, so reserves 64MiB of virtual memory.Given that 32 < 512, you only need 1 L3 entry to map the 32 L2s. Same argument holds for L4 to L3, you only need 1 L4 to map (gasp!) 1 L3 entry.
Is it arbitrary ?
Yes; big enough to fit kernel and modules, low enough to avoid ridiculously high adresses for the direct mappings used for fast PA/VA translations.
-- Jean-Yves Migeon