In file src/sys/arch/amd64/include/pmap.h:

/*
  * The x86_64 pmap module closely resembles the i386 one. It uses
  * the same recursive entry scheme, and the same alternate area
  * trick for accessing non-current pmaps. See the i386 pmap.h
  * for a description. The obvious difference is that 3 extra
  * levels of page table need to be dealt with. The level 1 page
  * table pages are at:
  *
  * l1: 0x00007f8000000000 - 0x00007fffffffffff     (39 bits, needs PML4 
entry)
  *
  * The alternate space is at:
  *
  * l1: 0xffffff8000000000 - 0xffffffffffffffff     (39 bits, needs PML4 
entry)
  *
  * The rest is kept as physical pages in 3 UVM objects, and is
  * temporarily mapped for virtual access when needed. [...]


Does the reference to "level 1 page table" mean the top level PML4 page 
table? If not, which of all the available level 1 page tables does it 
mean? There are many level 1 page tables and there is only one level 4 
page table.

If it means PML4, the recursive mapping just points to another page 
table and not to the physical address of a page. I think that is why 
"The rest (of the page tables) is kept as physical pages in 3 UVM 
objects, and is temporarily mapped for virtual access when needed". Do 
these UVM objects work like a cache that save the last page tables used?

Thanks,
Constantine