Thanks for all the replies to my question.  I'll append some details 
I omitted to this message.

I'm afraid I've an embarrassing admission to make, sorry.  It 
eventually dawned on me that the fact I'm using a serial console on 
the PWS is significant.  When I redirected build.sh's output to a 
file instead of letting it go to stdout this was the result:

pws500# /usr/bin/time sh -c './build.sh -D ../DistribDir -R 
../ReleaseDir -M ../obj -T ../tools release > build.sh.log 2>&1'
     25732.37 real     19465.53 user      3901.02 sys

so, about 7.15 hours, which is faster than when I tried building 
port-i386 again on the PII (also redirecting its output to a file):

ap1# /usr/bin/time sh -c './build.sh -D ../DistribDir -R 
../ReleaseDir release > build.sh.log 2>&1'
     27038.66 real     20011.04 user      2451.70 sys

Previously I'd been letting build.sh's output go to stdout on the PII 
as well, but that was via a telnet session.

Thanks for suggesting building port-sparc64 Manuel.  That was my 
first successful cross build on an alpha.  I'd only tried the i386 
and macppc ports before and both failed.


Ray



My PWS has a 4MB bcache module and its hard disks are 7200 rpm SCSI 
ones attached to a Symbios controller:

siop0 at pci1 dev 8 function 0: Symbios Logic 53c875 (ultra-wide scsi)
siop0: using on-board RAM
siop0: interrupting at dec 550 irq 12
sd0 at scsibus0 target 0 lun 0: <DEC, RZ2CC-KB (C) DEC, DC2B> disk fixed
sd0: 4091 MB, 3708 cyl, 20 head, 113 sec, 512 bytes/sect x 8380080 sectors
sd0: sync (50.00ns offset 15), 16-bit (40.000MB/s) transfers, tagged queueing
sd1 at scsibus0 target 1 lun 0: <SEAGATE, ST318436LW, 0005> disk fixed
sd1: 17522 MB, 14384 cyl, 6 head, 415 sec, 512 bytes/sect x 35885168 sectors
sd1: sync (50.00ns offset 16), 16-bit (40.000MB/s) transfers, tagged queueing
sd2 at scsibus0 target 2 lun 0: <SEAGATE, ST318417N, 0105> disk fixed
sd2: 17547 MB, 29851 cyl, 2 head, 601 sec, 512 bytes/sect x 35937500 sectors
sd2: sync (50.00ns offset 16), 8-bit (20.000MB/s) transfers, tagged queueing

sd1 and sd2 are "joined" with ccd (with no interleaving) to make a 
single ~ 36 GB partition.


The PII's disks are 7200 rpm IDE ones:

pciide0 at pci0 dev 7 function 1: Intel 82371AB IDE controller 
(PIIX4) (rev. 0x01)
pciide0: bus-master DMA support present
pciide0: primary channel wired to compatibility mode
wd0 at pciide0 channel 0 drive 0: <ST340810A>
wd0: drive supports 16-sector PIO transfers, LBA addressing
wd0: 38166 MB, 16383 cyl, 16 head, 63 sec, 512 bytes/sect x 78165360 sectors
wd0: 32-bit data port
wd0: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 5 (Ultra/100)
pciide0: primary channel interrupting at irq 14
wd0(pciide0:0:0): using PIO mode 4, Ultra-DMA mode 2 (Ultra/33) 
(using DMA data transfers)
pciide0: secondary channel wired to compatibility mode

pciide1 at pci0 dev 11 function 0: CMD Technology PCI0649 (rev. 0x01)
pciide1: bus-master DMA support present
pciide1: primary channel configured to native-PCI mode
pciide1: using irq 11 for native-PCI interrupt
wd2 at pciide1 channel 0 drive 0: <ST340016A>
wd2: drive supports 16-sector PIO transfers, LBA addressing
wd2: 38166 MB, 16383 cyl, 16 head, 63 sec, 512 bytes/sect x 78165360 sectors
wd2: 32-bit data port
wd2: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 5 (Ultra/100)
wd2(pciide1:0:0): using PIO mode 4, Ultra-DMA mode 5 (Ultra/100) 
(using DMA data transfers)
pciide1: secondary channel configured to native-PCI mode
pciide1: disabling secondary channel (no drives)