Subject: Re: tlp errors
To: Thor Lancelot Simon <email@example.com>
From: Jason R Thorpe <firstname.lastname@example.org>
Date: 04/16/2002 19:44:48
On Tue, Apr 16, 2002 at 10:23:04PM -0400, Thor Lancelot Simon wrote:
> > > tlp0: receive error: MII error
> > > tlp0: receive error: dribbling bit
> > > tlp0: receive error: CRC error
> > This is the classic sympton of a duplex mismatch. Make sure your tlp
> > is in half-duplex mode.
> If it has an MII to have errors on, can't its PHY do Nway correctly?
"MII error" is the name of the bit, but it's really "media error".
The chip in question is a 21040, which doesn't do NWAY.
-- Jason R. Thorpe <email@example.com>