On Wed, 16 Feb 2000 21:59:09 -0500 
 "Kevin P. Neal" <kpneal@pobox.com> wrote:

 > Say, is a memory barrier instruction needed after unlocking a lock?
 > Currently unlocking is done by a memory barrier followed by
 > "*(lock) = 0;".
 > 
 > Here's something else:
 > 
 > (I)5-22 in 5.6.3 Implied Barriers says "There are no implied barriers in
 > Alpha". 

Right, technically, yes, in an MP environment (where another processor
may in fact be an I/O device snooping memory).

 > Then on the next page it says, for a "Single Processor Data Stream",
 > that "No barriers are ever needed. A read to physical address X will
 > always return the value written by the immediately preceding write to
 > X in the processor issue sequence.". 

Right, the barriers aren't needed if there is only one processor
accessing a memory location.  But they are needed for strict correctness.

        -- Jason R. Thorpe <thorpej@nas.nasa.gov>