Subject: Re: linear and non-cacheable mapping vs bwx
To: Jason Thorpe <thorpej@nas.nasa.gov>
From: Matthias Drochner <drochner@zel459.zel.kfa-juelich.de>
List: port-alpha
Date: 09/03/1999 20:47:49
thorpej@nas.nasa.gov said:
> FWIW, I now have some GA-620 boards, and plan on plopping them into
> Alphas, some of which (8200s) do not have BWX.  So, I'll be motivated
> to make this work. 

As I just wrote to cgd, this is probably not too hard.
I've seen only 2 places in the code where the linear mapping
is used:
-ti_mem(), only used in initialization, can be easily changed
-ti_encap() - the descriptor accessed here can be in shared
 or host memory, depending on the chip version. I'd propose
 to handle 3 cases:
 -host mem
 -chip mem, have linear access, handle like host mem
  (but should add a wbflush())
 -chip mem, no linear access, use bus_space_xxx()

(The ti_cmd_ring pointer seems useless.)

best regards
Matthias