In article <Marcel-1.53-0507070856-f7fZSTv@risco.home> you write:
>I saw on Drobe yesterday, and in csa.announce today that Simtec have a
>clearance sale (see http://www.simtec.co.uk/products/clearance/) inculding
>Hydra multi-processor cards for ukp50 (+VAT and carriage).
>
>Can NetBSD/acorn32 make use of multi processors using the Hydra card?

No.  Well, if you use code from the bjh21-hydra branch, you might be able to
spin up the slave processors and run some kernel code on them, but that's
about it.

> What would be needed to enable it?

A really rather large amount of work.  My work on it stalled when the
inter-processor interrupts didn't seem to be behaving as the documentation
said they should, then I moved house and I haven't actually reassembled the
Hydra since then.  Other problems include:

* The lack of any coherency between the CPU caches means that you need a
cache flush after every lock operation, and you need to rewrite the
simple_lock routines not to rely on cache-coherency.  This also means that
the finer-grained NetBSD's locking gets, the slower the Hydra will go.

* The new ARM pmap is explicitly documented as being fundamentally
incompatible with SMP on low-vector CPUs.

* Much of the ARM MD code needs updating to understand SMP.

* Once you've done all that, you end up with something slower than an SA-110
anyway.

I'll probably have another attack at the problem at some point (if only to
merge bjh21-hydra back into the trunk), but I don't expect anything very
useful to come of it.

-- 
Ben Harris                                                   <bjh21@netbsd.org>
Portmaster, NetBSD/acorn26           <URL:http://www.netbsd.org/Ports/acorn26/>