CVS commit: wip/verilog-current

["Makoto Fujiwara" <makoto%users.sourceforge.net@localhost>]

Module name:    wip
Committed by:   makoto
Date:           Fri Dec 20 02:19:53 UTC 2013

Added Files:
        wip/verilog-current: COMMIT_MSG DESCR Makefile PLIST buildlink3.mk
            distinfo
        wip/verilog-current/patches: patch-ad

Log Message:
Import verilog-current-20130827 as wip/verilog-current.

Icarus Verilog is a Verilog simulation and synthesis tool. It operates as a
compiler, compiling source code writen in Verilog (IEEE-1364) into some target
format. For batch simulation, the compiler can generate C++ code that is
compiled and linked with a run time library (called "vvm") then executed as
a command to run the simulation. For synthesis, the compiler generates
netlists in the desired format.

The compiler proper is intended to parse and elaborate design descriptions
written to the IEEE standard IEEE Std 1364-1995. This is a fairly large and
complex standard, so it will take some time for it to get there, but that's
the goal. I'll be tracking the upcoming IEEE Std 1364-1999 revision as well,
and some -1999 features will creep in.

Please note that this package is a development snapshot and while it contains
the latest and greatest features, it may be buggy as well.  There is a separate
verilog package which is made of the stable releases.

To generate a diff of this commit:
cvs -z3 rdiff -u -r0 -r1.1 wip/verilog-current/COMMIT_MSG \
    wip/verilog-current/DESCR wip/verilog-current/Makefile \
    wip/verilog-current/PLIST wip/verilog-current/buildlink3.mk \
    wip/verilog-current/distinfo wip/verilog-current/patches/patch-ad

To view a diff of this commit:
http://pkgsrc-wip.cvs.sourceforge.net/pkgsrc-wip/wip/verilog-current/COMMIT_MSG?r1=0&r2=1.1
http://pkgsrc-wip.cvs.sourceforge.net/pkgsrc-wip/wip/verilog-current/DESCR?r1=0&r2=1.1
http://pkgsrc-wip.cvs.sourceforge.net/pkgsrc-wip/wip/verilog-current/Makefile?r1=0&r2=1.1
http://pkgsrc-wip.cvs.sourceforge.net/pkgsrc-wip/wip/verilog-current/PLIST?r1=0&r2=1.1
http://pkgsrc-wip.cvs.sourceforge.net/pkgsrc-wip/wip/verilog-current/buildlink3.mk?r1=0&r2=1.1
http://pkgsrc-wip.cvs.sourceforge.net/pkgsrc-wip/wip/verilog-current/distinfo?r1=0&r2=1.1
http://pkgsrc-wip.cvs.sourceforge.net/pkgsrc-wip/wip/verilog-current/patches/patch-ad?r1=0&r2=1.1

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

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