yosys: update to release 0.33

[Lloyd Parkes <lloyd%must-have-coffee.gen.nz@localhost>]

Module Name:	pkgsrc-wip
Committed By:	Lloyd Parkes <lloyd%must-have-coffee.gen.nz@localhost>
Pushed By:	lloyd
Date:		Sun Sep 24 12:10:34 2023 +1300
Changeset:	52e7d7ff1539295465406482ce51034313b86a98

Modified Files:
	yosys/Makefile
	yosys/PLIST
	yosys/distinfo
Removed Files:
	yosys/patches/patch-kernel_rtlil.cc
	yosys/patches/patch-kernel_rtlil.h

Log Message:
yosys: update to release 0.33

The memory guard patch for GCC is no longer needed.

Support for more hardware was added.

To see a diff of this commit:
https://wip.pkgsrc.org/cgi-bin/gitweb.cgi?p=pkgsrc-wip.git;a=commitdiff;h=52e7d7ff1539295465406482ce51034313b86a98

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

diffstat:
 yosys/Makefile                      |  2 +-
 yosys/PLIST                         | 43 +++++++++++++++++++++++++++++++------
 yosys/distinfo                      |  8 +++----
 yosys/patches/patch-kernel_rtlil.cc | 14 ------------
 yosys/patches/patch-kernel_rtlil.h  | 39 ---------------------------------
 5 files changed, 41 insertions(+), 65 deletions(-)

diffs:
diff --git a/yosys/Makefile b/yosys/Makefile
index d34878a16f..7b89d61ea5 100644
--- a/yosys/Makefile
+++ b/yosys/Makefile
@@ -2,7 +2,7 @@
 
 GITHUB_PROJECT=	yosys
 GITHUB_TAG=	refs/tags/${DISTNAME}
-DISTNAME=	yosys-0.29
+DISTNAME=	yosys-0.33
 CATEGORIES=	devel
 MASTER_SITES=	${MASTER_SITE_GITHUB:=YosysHQ/}
 
diff --git a/yosys/PLIST b/yosys/PLIST
index 29e6c2d809..ef16090154 100644
--- a/yosys/PLIST
+++ b/yosys/PLIST
@@ -46,6 +46,14 @@ share/yosys/efinix/brams_map.v
 share/yosys/efinix/cells_map.v
 share/yosys/efinix/cells_sim.v
 share/yosys/efinix/gbuf_map.v
+share/yosys/fabulous/arith_map.v
+share/yosys/fabulous/cells_map.v
+share/yosys/fabulous/ff_map.v
+share/yosys/fabulous/io_map.v
+share/yosys/fabulous/latches_map.v
+share/yosys/fabulous/prims.v
+share/yosys/fabulous/ram_regfile.txt
+share/yosys/fabulous/regfile_map.v
 share/yosys/gate2lut.v
 share/yosys/gatemate/arith_map.v
 share/yosys/gatemate/brams.txt
@@ -66,6 +74,7 @@ share/yosys/gowin/brams.txt
 share/yosys/gowin/brams_map.v
 share/yosys/gowin/cells_map.v
 share/yosys/gowin/cells_sim.v
+share/yosys/gowin/cells_xtra.v
 share/yosys/gowin/lutrams.txt
 share/yosys/gowin/lutrams_map.v
 share/yosys/greenpak4/cells_blackbox.v
@@ -98,6 +107,7 @@ share/yosys/include/frontends/ast/ast.h
 share/yosys/include/frontends/ast/ast_binding.h
 share/yosys/include/frontends/blif/blifparse.h
 share/yosys/include/kernel/binding.h
+share/yosys/include/kernel/cellaigs.h
 share/yosys/include/kernel/celledges.h
 share/yosys/include/kernel/celltypes.h
 share/yosys/include/kernel/consteval.h
@@ -106,6 +116,7 @@ share/yosys/include/kernel/ff.h
 share/yosys/include/kernel/ffinit.h
 share/yosys/include/kernel/fstdata.h
 share/yosys/include/kernel/hashlib.h
+share/yosys/include/kernel/json.h
 share/yosys/include/kernel/log.h
 share/yosys/include/kernel/macc.h
 share/yosys/include/kernel/mem.h
@@ -117,6 +128,7 @@ share/yosys/include/kernel/satgen.h
 share/yosys/include/kernel/sigtools.h
 share/yosys/include/kernel/utils.h
 share/yosys/include/kernel/yosys.h
+share/yosys/include/kernel/yw.h
 share/yosys/include/libs/ezsat/ezminisat.h
 share/yosys/include/libs/ezsat/ezsat.h
 share/yosys/include/libs/fst/fstapi.h
@@ -156,12 +168,30 @@ share/yosys/intel_alm/common/mem_sim.v
 share/yosys/intel_alm/common/misc_sim.v
 share/yosys/intel_alm/common/quartus_rename.v
 share/yosys/intel_alm/cyclonev/cells_sim.v
-share/yosys/machxo2/brams.txt
-share/yosys/machxo2/brams_map.v
-share/yosys/machxo2/cells_map.v
-share/yosys/machxo2/cells_sim.v
-share/yosys/machxo2/lutrams.txt
-share/yosys/machxo2/lutrams_map.v
+share/yosys/lattice/arith_map_ccu2c.v
+share/yosys/lattice/arith_map_ccu2d.v
+share/yosys/lattice/brams_16kd.txt
+share/yosys/lattice/brams_8kc.txt
+share/yosys/lattice/brams_map_16kd.v
+share/yosys/lattice/brams_map_8kc.v
+share/yosys/lattice/ccu2c_sim.vh
+share/yosys/lattice/ccu2d_sim.vh
+share/yosys/lattice/cells_bb_ecp5.v
+share/yosys/lattice/cells_bb_xo2.v
+share/yosys/lattice/cells_bb_xo3.v
+share/yosys/lattice/cells_bb_xo3d.v
+share/yosys/lattice/cells_ff.vh
+share/yosys/lattice/cells_io.vh
+share/yosys/lattice/common_sim.vh
+share/yosys/lattice/dsp_map_18x18.v
+share/yosys/lattice/latches_map.v
+share/yosys/lattice/cells_map.v
+share/yosys/lattice/cells_sim_ecp5.v
+share/yosys/lattice/cells_sim_xo2.v
+share/yosys/lattice/cells_sim_xo3.v
+share/yosys/lattice/cells_sim_xo3d.v
+share/yosys/lattice/lutrams.txt
+share/yosys/lattice/lutrams_map.v
 share/yosys/mul2dsp.v
 share/yosys/nexus/arith_map.v
 share/yosys/nexus/brams.txt
@@ -194,6 +224,7 @@ share/yosys/sf2/cells_map.v
 share/yosys/sf2/cells_sim.v
 share/yosys/simcells.v
 share/yosys/simlib.v
+share/yosys/smtmap.v
 share/yosys/techmap.v
 share/yosys/xilinx/abc9_model.v
 share/yosys/xilinx/arith_map.v
diff --git a/yosys/distinfo b/yosys/distinfo
index 8573826687..4a96edab5d 100644
--- a/yosys/distinfo
+++ b/yosys/distinfo
@@ -1,8 +1,6 @@
 $NetBSD$
 
-BLAKE2s (yosys-0.29.tar.gz) = 76c4a9e23acebb0fc5818bd9603460327bce2883d9b7fda57c9afaa7843e4e76
-SHA512 (yosys-0.29.tar.gz) = f33d78f198576657db9cd558a770e6201a4f9227f01f17c1097b77d50946ec1a001a5ef144cf87958ba6335bb37c2dacde69463d0a98ae1f6754ad0d75def1b9
-Size (yosys-0.29.tar.gz) = 2524267 bytes
-SHA1 (patch-kernel_rtlil.cc) = 9e85969577560c67dd40d2fa63702ca103511a4e
-SHA1 (patch-kernel_rtlil.h) = d468c6736227ac176c153540fdb230038ff113f3
+BLAKE2s (yosys-0.33.tar.gz) = 77600fe6839b7ffa2c8655b1b3290bb595e09d63a9b67ee7791d5d8bbdbbde28
+SHA512 (yosys-0.33.tar.gz) = e635df2b5fccf14a45c2f8ec342e7415105a46383333f11b7509907f197adc74a04b7fbb56eadddbb68dc5671619770892a0a93210ba68ef23044bf52d70f616
+Size (yosys-0.33.tar.gz) = 2586120 bytes
 SHA1 (patch-kernel_yosys.cc) = 81e504f0a61baa47eca7cec021ae60d8ed432e3b
diff --git a/yosys/patches/patch-kernel_rtlil.cc b/yosys/patches/patch-kernel_rtlil.cc
deleted file mode 100644
index 82954cf8bb..0000000000
--- a/yosys/patches/patch-kernel_rtlil.cc
+++ /dev/null
@@ -1,14 +0,0 @@
-$NetBSD$
-
-Add a destructor guard that can be accessed after the destructors are run.
-
---- kernel/rtlil.cc.orig	2022-10-05 09:30:38.000000000 +0000
-+++ kernel/rtlil.cc
-@@ -30,6 +30,7 @@
- 
- YOSYS_NAMESPACE_BEGIN
- 
-+bool RTLIL::IdString::destruct_guard_ok;
- RTLIL::IdString::destruct_guard_t RTLIL::IdString::destruct_guard;
- std::vector<char*> RTLIL::IdString::global_id_storage_;
- dict<char*, int, hash_cstr_ops> RTLIL::IdString::global_id_index_;
diff --git a/yosys/patches/patch-kernel_rtlil.h b/yosys/patches/patch-kernel_rtlil.h
deleted file mode 100644
index 8d474e8734..0000000000
--- a/yosys/patches/patch-kernel_rtlil.h
+++ /dev/null
@@ -1,39 +0,0 @@
-$NetBSD$
-
-Move the ok flag out of the destruct_guard_t so that GCC won't optimise
-~destruct_guard_t() into a NO-OP.
-
---- kernel/rtlil.h.orig	2022-10-05 09:30:38.000000000 +0000
-+++ kernel/rtlil.h
-@@ -85,10 +85,10 @@ namespace RTLIL
- 
- 		// the global id string cache
- 
-+		static bool destruct_guard_ok; // POD, will be initialized to zero
- 		static struct destruct_guard_t {
--			bool ok; // POD, will be initialized to zero
--			destruct_guard_t() { ok = true; }
--			~destruct_guard_t() { ok = false; }
-+			destruct_guard_t() { destruct_guard_ok = true; }
-+			~destruct_guard_t() { destruct_guard_ok = false; }
- 		} destruct_guard;
- 
- 		static std::vector<char*> global_id_storage_;
-@@ -147,7 +147,7 @@ namespace RTLIL
- 
- 		static int get_reference(const char *p)
- 		{
--			log_assert(destruct_guard.ok);
-+			log_assert(destruct_guard_ok);
- 
- 			if (!p[0])
- 				return 0;
-@@ -225,7 +225,7 @@ namespace RTLIL
- 		{
- 			// put_reference() may be called from destructors after the destructor of
- 			// global_refcount_storage_ has been run. in this case we simply do nothing.
--			if (!destruct_guard.ok || !idx)
-+			if (!destruct_guard_ok || !idx)
- 				return;
- 
- 		#ifdef YOSYS_XTRACE_GET_PUT