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MesaLib-dfbsd-meson: Update wip/MesaLib-dfbsd-meson to git 2019-04-24
Module Name: pkgsrc-wip
Committed By: David Shao <davshao%gmail.com@localhost>
Pushed By: dshao
Date: Thu Apr 25 00:34:18 2019 -0700
Changeset: 4c4025cae9d9b50545b10f3caf986fe8e82a4f63
Modified Files:
MesaLib-dfbsd-meson/Makefile
MesaLib-dfbsd-meson/distinfo
MesaLib-dfbsd-meson/patches/patch-src_amd_vulkan_radv__device.c
MesaLib-dfbsd-meson/patches/patch-src_gallium_drivers_iris_meson.build
MesaLib-dfbsd-meson/patches/patch-src_gallium_drivers_radeonsi_si__compute__blit.c
Log Message:
MesaLib-dfbsd-meson: Update wip/MesaLib-dfbsd-meson to git 2019-04-24
To see a diff of this commit:
https://wip.pkgsrc.org/cgi-bin/gitweb.cgi?p=pkgsrc-wip.git;a=commitdiff;h=4c4025cae9d9b50545b10f3caf986fe8e82a4f63
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
diffstat:
MesaLib-dfbsd-meson/Makefile | 34 +++++++++-------------
MesaLib-dfbsd-meson/distinfo | 14 ++++-----
.../patches/patch-src_amd_vulkan_radv__device.c | 6 ++--
.../patch-src_gallium_drivers_iris_meson.build | 12 ++++----
...rc_gallium_drivers_radeonsi_si__compute__blit.c | 20 ++++++-------
5 files changed, 40 insertions(+), 46 deletions(-)
diffs:
diff --git a/MesaLib-dfbsd-meson/Makefile b/MesaLib-dfbsd-meson/Makefile
index f88b278ee0..d1f74ad50b 100644
--- a/MesaLib-dfbsd-meson/Makefile
+++ b/MesaLib-dfbsd-meson/Makefile
@@ -1,31 +1,25 @@
# $NetBSD: Makefile,v 1.19 2019/04/11 15:52:08 maya Exp $
-# 2019-04-20 intel/fs: Add support for float16 to the fsign optimizations
-COMMIT_ID= a6ccc4c0c893cfd978068f1d75ad0e001182b381
+# 2019-04-24 i965: fix icelake performance query enabling
+COMMIT_ID= f15409ee5539579c227fa916d410945b0516d712
-# 2019-04-19 anv: Rework the descriptor set layout create loop
-# COMMIT_ID= 828ec411545ee6cdcabe228002fca3e4c5d14274
+# 2019-04-24 iris: Split iris_flush_and_dirty_for_history into two helpers.
+# COMMIT_ID= 21688a306b299ae7214f4fb139a6813e0018c0a8
-# 2019-04-18 iris: Be less aggressive at postdraw work skipping
-# COMMIT_ID= a913fbf124e201a8bf53fe8385619a71a6e9594b
+# 2019-04-23 intel/isl: Resize clear color buffer to full cacheline
+# COMMIT_ID= f2041d2a9266ec14270b6da9bf9ce2b54d555ebd
-# 2019-04-17 Add no_aos_sampling GALLIVM_PERF option
-# COMMIT_ID= 829f278ad0042b0bb5026b10e7393fa3e11498b2
+# 2019-04-23 intel/fs: Fix D to W conversion in opt_combine_constants
+# COMMIT_ID= 21223acf7d5b39e5eb2b248330519cdbee3e63e8
-# 2019-04-17 gallivm: fix saturated signed add / sub with llvm 9
-# COMMIT_ID= dded2edf8bedb9a5bafd7788e52dc8e714527186
+# 2019-04-23 gallium: replace drm_driver_descriptor::configuration with driconf_xml
+# COMMIT_ID= d8b296d3ad96cb04ee57234a0b1a6a046e08a1a7
-# 2019-04-16 radeonsi/nir: fix scanning of bindless images
-# COMMIT_ID= 3c5a9ab9f01d1d299eea1b99b9346c639fc30612
+# 2019-04-23 st/mesa/radeonsi: fix race between destruction of types and shader compilation
+# COMMIT_ID= a6b7068ff5fbf4694a45a6e07adac5047e574514
-# 2019-04-16 iris: Add texture cache flushing hacks for blit and resource_copy_regionHEADmaster
-# COMMIT_ID= c4478889b7176ea5aed52d1630bedb43797a00f0
-
-# 2019-04-16 winsys/amdgpu: don't set GTT with GDS & OA placements on APUs
-# COMMIT_ID= 4f715868a94b2c43656b3574b876bd254757521b
-
-# 2019-04-16 compiler/glsl: handle case where we have multiple users for types
-# COMMIT_ID= 624789e3708c87ea2a4c8d2266266b489b421cba
+# 2019-04-23 radv: Add adaptive_sync driconfig option and enable it by default.
+# COMMIT_ID= 3844ed8d44677588bc29d470d0b41ef7816591b
PORTNAME= mesa
diff --git a/MesaLib-dfbsd-meson/distinfo b/MesaLib-dfbsd-meson/distinfo
index 9a1266b86a..f9d367598d 100644
--- a/MesaLib-dfbsd-meson/distinfo
+++ b/MesaLib-dfbsd-meson/distinfo
@@ -1,14 +1,14 @@
$NetBSD: distinfo,v 1.16 2019/02/22 15:40:35 tnn Exp $
-SHA1 (mesa-a6ccc4c0c893cfd978068f1d75ad0e001182b381.tar.xz) = 263d0bd8b76a6cc3021e894dc884902830f44067
-RMD160 (mesa-a6ccc4c0c893cfd978068f1d75ad0e001182b381.tar.xz) = d1170e34712979540f1760ca0184776f2b00e72c
-SHA512 (mesa-a6ccc4c0c893cfd978068f1d75ad0e001182b381.tar.xz) = e5583e8080c68a61be046020e4181bc26af05952f071cfa2db19c40f978c44d34022ba0c73647b150a0be13c84bfe1b28f5ecc6c5305ecc36b9324c457a5d93d
-Size (mesa-a6ccc4c0c893cfd978068f1d75ad0e001182b381.tar.xz) = 10815800 bytes
+SHA1 (mesa-f15409ee5539579c227fa916d410945b0516d712.tar.xz) = 1efcafa718901f19c66a0a5a5527702a1ae7eae2
+RMD160 (mesa-f15409ee5539579c227fa916d410945b0516d712.tar.xz) = d8ed38354c2df231918eb2bf3aaee0d19dea7cc1
+SHA512 (mesa-f15409ee5539579c227fa916d410945b0516d712.tar.xz) = 357802373a0050a34da4a38134fdbe3666f505a9ca1cdbe0cb9591249c23cb0fce31b235d4e0644ceaa0aad13625652108afa670be181e2d93183b0cd1e6c15f
+Size (mesa-f15409ee5539579c227fa916d410945b0516d712.tar.xz) = 10833976 bytes
SHA1 (patch-include_GL_internal_dri__interface.h) = ed567949ae44f7477738138347cf9648b9a8d634
SHA1 (patch-meson.build) = 3cd30902cd5af7bc860dd2984a51d9ebf051662e
SHA1 (patch-meson__options.txt) = 171ac109444b0ce8ea37e53b72f529a4b5e5c6f6
SHA1 (patch-src_amd_common_ac__debug.c) = 8233367c3b5bc344442ea8d19488fdd1e3791ae9
-SHA1 (patch-src_amd_vulkan_radv__device.c) = d47b69cd3bc70b38a128ffe686e1ffdbf4f9c960
+SHA1 (patch-src_amd_vulkan_radv__device.c) = 2eef90c3139ffa8349f5960eb328b7df3071a45c
SHA1 (patch-src_amd_vulkan_winsys_amdgpu_radv__amdgpu__cs.c) = 1fe81a7b16e36dc9125400c20543271216a33a45
SHA1 (patch-src_compiler_builtin__type__macros.h) = 128030d0c532e5f3982dc6ebde1957fc0ca7f5d5
SHA1 (patch-src_compiler_glsl_glsl__parser__extras.cpp) = ef114d6e288e6d212fce9d1c0606f7d454a171c4
@@ -22,7 +22,7 @@ SHA1 (patch-src_gallium_auxiliary_util_u__format__tests.c) = d878e6f3e9a0a37d490
SHA1 (patch-src_gallium_drivers_freedreno_freedreno__screen.c) = d76bf52c25609d641dbf4021e81282cbdc925976
SHA1 (patch-src_gallium_drivers_i915_i915__fpc__translate.c) = 1c69741c2c9285569c6326d8d29d5af936e1929a
SHA1 (patch-src_gallium_drivers_iris_iris__bufmgr.c) = 542b24813743290ce031cd1632e83f8255b71a32
-SHA1 (patch-src_gallium_drivers_iris_meson.build) = 9b94ae7047763cc4b1be5b39a3d9cac898e10f65
+SHA1 (patch-src_gallium_drivers_iris_meson.build) = 31f0afab5212860917fe78e2b282a730187502ef
SHA1 (patch-src_gallium_drivers_llvmpipe_lp__setup__line.c) = bc049154cbfb788855ad6675a339ef07b15cd573
SHA1 (patch-src_gallium_drivers_llvmpipe_lp__setup__point.c) = f6a2c5940010cd93f955c969616af7a7c550fab4
SHA1 (patch-src_gallium_drivers_llvmpipe_lp__setup__tri.c) = 430fdde0943074c0b4cfeaebe5b7e3c930c6bcf3
@@ -30,7 +30,7 @@ SHA1 (patch-src_gallium_drivers_nouveau_meson.build) = 59de3f012f604ae185d90c5c6
SHA1 (patch-src_gallium_drivers_nouveau_nouveau__vp3__video.c) = 04f95784c3270c9bb7e95377982e217962481525
SHA1 (patch-src_gallium_drivers_nouveau_nv50_nv84__video.c) = 1b4239fe053523835ecac006894bdb0cde0ee626
SHA1 (patch-src_gallium_drivers_radeonsi_si__buffer.c) = dc2dcb0f87a01ae0162a8c5746911c53e669cd2e
-SHA1 (patch-src_gallium_drivers_radeonsi_si__compute__blit.c) = 65235a932809c434546db0416e69241d62cdaf06
+SHA1 (patch-src_gallium_drivers_radeonsi_si__compute__blit.c) = 86ba535e10a1d692877782cef6a1ec4aafeec4c7
SHA1 (patch-src_gallium_drivers_radeonsi_si__dma__cs.c) = 3c6a2a49e40dd8f99f5f393ad6e03345111cdeb1
SHA1 (patch-src_gallium_drivers_radeonsi_si__gfx__cs.c) = 98ca07e2cc518125e5ec8924cbadc19f4c13de56
SHA1 (patch-src_gallium_drivers_radeonsi_si__pipe.c) = 551e9076cdcead2d564bf8c6b8c75bea1733c569
diff --git a/MesaLib-dfbsd-meson/patches/patch-src_amd_vulkan_radv__device.c b/MesaLib-dfbsd-meson/patches/patch-src_amd_vulkan_radv__device.c
index 1ae185a840..f0ec6ea1be 100644
--- a/MesaLib-dfbsd-meson/patches/patch-src_amd_vulkan_radv__device.c
+++ b/MesaLib-dfbsd-meson/patches/patch-src_amd_vulkan_radv__device.c
@@ -4,11 +4,11 @@ From graphics/mesa-dri: update to 18.3.1
https://reviews.freebsd.org/D17872
---- src/amd/vulkan/radv_device.c.orig 2019-04-16 20:04:22.000000000 +0000
+--- src/amd/vulkan/radv_device.c.orig 2019-04-23 23:49:39.000000000 +0000
+++ src/amd/vulkan/radv_device.c
-@@ -50,6 +50,14 @@
- #include "util/mesa-sha1.h"
+@@ -51,6 +51,14 @@
#include "compiler/glsl_types.h"
+ #include "util/xmlpool.h"
+#ifndef CLOCK_MONOTONIC_RAW
+# ifdef CLOCK_MONOTONIC_FAST
diff --git a/MesaLib-dfbsd-meson/patches/patch-src_gallium_drivers_iris_meson.build b/MesaLib-dfbsd-meson/patches/patch-src_gallium_drivers_iris_meson.build
index f38e425f4d..77b553cd06 100644
--- a/MesaLib-dfbsd-meson/patches/patch-src_gallium_drivers_iris_meson.build
+++ b/MesaLib-dfbsd-meson/patches/patch-src_gallium_drivers_iris_meson.build
@@ -1,8 +1,8 @@
$NetBSD$
---- src/gallium/drivers/iris/meson.build.orig 2019-02-27 03:56:56.000000000 +0000
+--- src/gallium/drivers/iris/meson.build.orig 2019-04-23 07:24:08.000000000 +0000
+++ src/gallium/drivers/iris/meson.build
-@@ -50,7 +50,7 @@ iris_gen_libs = []
+@@ -62,7 +62,7 @@ iris_gen_libs = []
foreach v : ['80', '90', '100', '110']
iris_gen_libs += static_library(
'libiris_gen@0@'.format(v),
@@ -11,12 +11,12 @@ $NetBSD$
include_directories : [inc_common, inc_intel, inc_nir],
c_args : [
c_vis_args, no_override_init_args, c_sse2_args,
-@@ -62,7 +62,7 @@ endforeach
+@@ -74,7 +74,7 @@ endforeach
libiris = static_library(
'iris',
-- [files_libiris, gen_xml_pack, nir_opcodes_h, nir_builder_opcodes_h],
-+ [files_libiris, gen_xml_pack, nir_opcodes_h, nir_builder_opcodes_h, nir_intrinsics_h],
+- [files_libiris, gen_xml_pack, nir_opcodes_h, nir_builder_opcodes_h,
++ [files_libiris, gen_xml_pack, nir_opcodes_h, nir_builder_opcodes_h, nir_intrinsics_h,
+ iris_driinfo_h],
include_directories : [
inc_src, inc_include, inc_gallium, inc_gallium_aux, inc_intel, inc_nir,
- inc_gallium_drivers,
diff --git a/MesaLib-dfbsd-meson/patches/patch-src_gallium_drivers_radeonsi_si__compute__blit.c b/MesaLib-dfbsd-meson/patches/patch-src_gallium_drivers_radeonsi_si__compute__blit.c
index 073b769cbb..7368fde31e 100644
--- a/MesaLib-dfbsd-meson/patches/patch-src_gallium_drivers_radeonsi_si__compute__blit.c
+++ b/MesaLib-dfbsd-meson/patches/patch-src_gallium_drivers_radeonsi_si__compute__blit.c
@@ -5,7 +5,7 @@ Commit: 9b331e462e5021d994859756d46cd2519d9c9c6e
https://cgit.freedesktop.org/mesa/mesa/commit/?id=9b331e462e5021d994859756d46cd2519d9c9c6e
---- src/gallium/drivers/radeonsi/si_compute_blit.c.orig 2019-02-09 12:52:15.000000000 +0000
+--- src/gallium/drivers/radeonsi/si_compute_blit.c.orig 2019-04-23 07:24:08.000000000 +0000
+++ src/gallium/drivers/radeonsi/si_compute_blit.c
@@ -34,10 +34,17 @@ static enum si_cache_policy get_cache_po
enum si_coherency coher,
@@ -25,9 +25,9 @@ https://cgit.freedesktop.org/mesa/mesa/commit/?id=9b331e462e5021d994859756d46cd2
return L2_BYPASS;
}
-@@ -180,6 +187,52 @@ void si_clear_buffer(struct si_context *
- uint64_t offset, uint64_t size, uint32_t *clear_value,
- uint32_t clear_value_size, enum si_coherency coher)
+@@ -189,6 +196,52 @@ void si_clear_buffer(struct si_context *
+ uint32_t clear_value_size, enum si_coherency coher,
+ bool force_cpdma)
{
+#if defined(REVERT_COPY_CLEAR)
+
@@ -78,7 +78,7 @@ https://cgit.freedesktop.org/mesa/mesa/commit/?id=9b331e462e5021d994859756d46cd2
if (!size)
return;
-@@ -258,6 +311,7 @@ void si_clear_buffer(struct si_context *
+@@ -268,6 +321,7 @@ void si_clear_buffer(struct si_context *
offset += aligned_size;
size -= aligned_size;
}
@@ -86,7 +86,7 @@ https://cgit.freedesktop.org/mesa/mesa/commit/?id=9b331e462e5021d994859756d46cd2
/* Handle non-dword alignment. */
if (size) {
-@@ -275,8 +329,61 @@ static void si_pipe_clear_buffer(struct
+@@ -285,8 +339,61 @@ static void si_pipe_clear_buffer(struct
const void *clear_value,
int clear_value_size)
{
@@ -140,15 +140,15 @@ https://cgit.freedesktop.org/mesa/mesa/commit/?id=9b331e462e5021d994859756d46cd2
+ }
+
+ si_clear_buffer(sctx, dst, offset, size, &dword_value,
-+ clear_value_size, SI_COHERENCY_SHADER);
++ clear_value_size, SI_COHERENCY_SHADER, false);
+#else
si_clear_buffer((struct si_context*)ctx, dst, offset, size, (uint32_t*)clear_value,
- clear_value_size, SI_COHERENCY_SHADER);
+ clear_value_size, SI_COHERENCY_SHADER, false);
+#endif
}
void si_copy_buffer(struct si_context *sctx,
-@@ -289,6 +396,17 @@ void si_copy_buffer(struct si_context *s
+@@ -299,6 +406,17 @@ void si_copy_buffer(struct si_context *s
enum si_coherency coher = SI_COHERENCY_SHADER;
enum si_cache_policy cache_policy = get_cache_policy(sctx, coher, size);
@@ -166,7 +166,7 @@ https://cgit.freedesktop.org/mesa/mesa/commit/?id=9b331e462e5021d994859756d46cd2
/* Only use compute for VRAM copies on dGPUs. */
if (sctx->screen->info.has_dedicated_vram &&
si_resource(dst)->domains & RADEON_DOMAIN_VRAM &&
-@@ -301,6 +419,7 @@ void si_copy_buffer(struct si_context *s
+@@ -311,6 +429,7 @@ void si_copy_buffer(struct si_context *s
si_cp_dma_copy_buffer(sctx, dst, src, dst_offset, src_offset, size,
0, coher, cache_policy);
}
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