webkit-gtk: Double-check registers used

[Leonardo Taccari <leot%NetBSD.org@localhost>]

Module Name:	pkgsrc-wip
Committed By:	Leonardo Taccari <leot%NetBSD.org@localhost>
Pushed By:	leot
Date:		Fri Oct 5 11:00:19 2018 +0200
Changeset:	c49a011fc9d7b9fd8d7bf99717d390d74348fcdd

Modified Files:
	webkit-gtk/distinfo
	webkit-gtk/patches/patch-Source_JavaScriptCore_runtime_MachineContext.h

Log Message:
webkit-gtk: Double-check registers used

- Make every CPU(...) case separate despite possible sharing of _REG_* definitions
  (cosmetic)
- Try to follow more closely other operating systems for CPU(ARM64) case

XXX: Still not tested on !CPU(X86_64) though!

To see a diff of this commit:
https://wip.pkgsrc.org/cgi-bin/gitweb.cgi?p=pkgsrc-wip.git;a=commitdiff;h=c49a011fc9d7b9fd8d7bf99717d390d74348fcdd

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

diffstat:
 webkit-gtk/distinfo                                |  2 +-
 ...-Source_JavaScriptCore_runtime_MachineContext.h | 32 +++++++++++++++-------
 2 files changed, 23 insertions(+), 11 deletions(-)

diffs:
diff --git a/webkit-gtk/distinfo b/webkit-gtk/distinfo
index d688ab0f14..25f53738ac 100644
--- a/webkit-gtk/distinfo
+++ b/webkit-gtk/distinfo
@@ -9,7 +9,7 @@ SHA1 (patch-Source_JavaScriptCore_assembler_ARMAssembler.h) = aad458e8b062c08331
 SHA1 (patch-Source_JavaScriptCore_assembler_MacroAssemblerARM.cpp) = f78e6150ed8901b3fe046b2ef182f50f1c7500a4
 SHA1 (patch-Source_JavaScriptCore_heap_MarkedSpace.cpp) = e6a23d5ef22bddd0a9606fb0e472960e4cf5673e
 SHA1 (patch-Source_JavaScriptCore_jit_ExecutableAllocator.cpp) = 36d29a5db03c2413ae93224ac391f3ff248983e8
-SHA1 (patch-Source_JavaScriptCore_runtime_MachineContext.h) = 928050c743dc889cb42fa4e74bec5664b8e1318c
+SHA1 (patch-Source_JavaScriptCore_runtime_MachineContext.h) = 07d505040a175c89c1e8e84b431c333c96293312
 SHA1 (patch-Source_ThirdParty_gtest_include_gtest_internal_gtest-port.h) = f1eee7f9d3012edee1915234c837cff820f97092
 SHA1 (patch-Source_WTF_wtf_Platform.h) = e419f26fbd01d315ea3033d628105c6e30cc594b
 SHA1 (patch-Source_WTF_wtf_StackBounds.cpp) = 22a71daac8443f079ad8bcc7285cfd7319c972b3
diff --git a/webkit-gtk/patches/patch-Source_JavaScriptCore_runtime_MachineContext.h b/webkit-gtk/patches/patch-Source_JavaScriptCore_runtime_MachineContext.h
index 9ee585f0c3..c25759f08d 100644
--- a/webkit-gtk/patches/patch-Source_JavaScriptCore_runtime_MachineContext.h
+++ b/webkit-gtk/patches/patch-Source_JavaScriptCore_runtime_MachineContext.h
@@ -13,7 +13,7 @@ XXX:
 
 --- Source/JavaScriptCore/runtime/MachineContext.h.orig	2018-08-21 16:06:10.000000000 +0000
 +++ Source/JavaScriptCore/runtime/MachineContext.h
-@@ -188,6 +188,18 @@ static inline void*& stackPointerImpl(mc
+@@ -188,6 +188,22 @@ static inline void*& stackPointerImpl(mc
  #error Unknown Architecture
  #endif
  
@@ -23,7 +23,11 @@ XXX:
 +    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_UESP]);
 +#elif CPU(X86_64)
 +    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_RSP]);
-+#elif CPU(ARM) || CPU(ARM64) || CPU(MIPS)
++#elif CPU(ARM)
++    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_SP]);
++#elif CPU(ARM64)
++    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_SP]);
++#elif CPU(MIPS)
 +    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_SP]);
 +#else
 +#error Unknown Architecture
@@ -32,7 +36,7 @@ XXX:
  #elif OS(FUCHSIA) || defined(__GLIBC__) || defined(__BIONIC__)
  
  #if CPU(X86)
-@@ -335,6 +347,20 @@ static inline void*& framePointerImpl(mc
+@@ -335,6 +351,22 @@ static inline void*& framePointerImpl(mc
  #error Unknown Architecture
  #endif
  
@@ -42,7 +46,9 @@ XXX:
 +    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_EBP]);
 +#elif CPU(X86_64)
 +    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_RBP]);
-+#elif CPU(ARM) || CPU(ARM64)
++#elif CPU(ARM)
++    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_FP]);
++#elif CPU(ARM64)
 +    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_FP]);
 +#elif CPU(MIPS)
 +    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_S8]);
@@ -53,7 +59,7 @@ XXX:
  #elif OS(FUCHSIA) || defined(__GLIBC__) || defined(__BIONIC__)
  
  // The following sequence depends on glibc's sys/ucontext.h.
-@@ -482,6 +508,20 @@ static inline void*& instructionPointerI
+@@ -482,6 +514,22 @@ static inline void*& instructionPointerI
  #error Unknown Architecture
  #endif
  
@@ -63,7 +69,9 @@ XXX:
 +    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_EIP]);
 +#elif CPU(X86_64)
 +    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_RIP]);
-+#elif CPU(ARM) || CPU(ARM64)
++#elif CPU(ARM)
++    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_PC]);
++#elif CPU(ARM64)
 +    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_PC]);
 +#elif CPU(MIPS)
 +    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_EPC]);
@@ -74,7 +82,7 @@ XXX:
  #elif OS(FUCHSIA) || defined(__GLIBC__) || defined(__BIONIC__)
  
  // The following sequence depends on glibc's sys/ucontext.h.
-@@ -639,6 +679,20 @@ inline void*& argumentPointer<1>(mcontex
+@@ -639,6 +687,22 @@ inline void*& argumentPointer<1>(mcontex
  #error Unknown Architecture
  #endif
  
@@ -84,8 +92,10 @@ XXX:
 +    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_EDX]);
 +#elif CPU(X86_64)
 +    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_RSI]);
-+#elif CPU(ARM) || CPU(ARM64)
++#elif CPU(ARM)
 +    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_R1]);
++#elif CPU(ARM64)
++    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_X1]);
 +#elif CPU(MIPS)
 +    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_A1]);
 +#else
@@ -95,7 +105,7 @@ XXX:
  #elif OS(FUCHSIA) || defined(__GLIBC__) || defined(__BIONIC__)
  
  // The following sequence depends on glibc's sys/ucontext.h.
-@@ -756,6 +810,20 @@ inline void*& llintInstructionPointer(mc
+@@ -756,6 +820,22 @@ inline void*& llintInstructionPointer(mc
  #error Unknown Architecture
  #endif
  
@@ -105,8 +115,10 @@ XXX:
 +    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_ESI]);
 +#elif CPU(X86_64)
 +    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_R8]);
-+#elif CPU(ARM) || CPU(ARM64)
++#elif CPU(ARM)
 +    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_R8]);
++#elif CPU(ARM64)
++    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_X4]);
 +#elif CPU(MIPS)
 +    return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_T4]);
 +#else