CVS commit: pkgsrc/graphics/librsvg

["Havard Eidnes" <he%netbsd.org@localhost>]

Module Name:    pkgsrc
Committed By:   he
Date:           Sat Oct 24 19:12:37 UTC 2026

Modified Files:
        pkgsrc/graphics/librsvg: distinfo
        pkgsrc/graphics/librsvg/patches:
            patch-.._vendor_wide-0.7.33_src_u8x16__.rs

Log Message:
graphics/librsvg: tweak patch so that this builds on big-endian arm64 again.


To generate a diff of this commit:
cvs rdiff -u -r1.75 -r1.76 pkgsrc/graphics/librsvg/distinfo
cvs rdiff -u -r1.1 -r1.2 \
    pkgsrc/graphics/librsvg/patches/patch-.._vendor_wide-0.7.33_src_u8x16__.rs

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: pkgsrc/graphics/librsvg/distinfo
diff -u pkgsrc/graphics/librsvg/distinfo:1.75 pkgsrc/graphics/librsvg/distinfo:1.76
--- pkgsrc/graphics/librsvg/distinfo:1.75       Wed Sep 23 12:43:04 2026
+++ pkgsrc/graphics/librsvg/distinfo    Sat Oct 24 19:12:37 2026
@@ -1,4 +1,4 @@
-$NetBSD: distinfo,v 1.75 2026/09/23 12:43:04 adam Exp $
+$NetBSD: distinfo,v 1.76 2026/10/24 19:12:37 he Exp $
 
 BLAKE2s (adler2-2.0.1.crate) = 4d391e0fcde91c7435ee9a5503fee4a5346f549f1b45e482ce3e1e151d90f8f5
 SHA512 (adler2-2.0.1.crate) = 555b2b7ba6f8116acccd0bcd16ed34cc78162c81023cff31a8566ffcd456c03832089fca2d5b668ceaac4fe8f922d31aa9c487f226a36cace294ff4a219bd91d
@@ -1090,7 +1090,7 @@ SHA1 (patch-.._vendor_wide-0.7.33_src_i8
 SHA1 (patch-.._vendor_wide-0.7.33_src_u16x8__.rs) = 00d9c69a40c5ce6c6caf7ee36856fcb9e69643da
 SHA1 (patch-.._vendor_wide-0.7.33_src_u32x4__.rs) = 6ef1a165bb39bb39a437b72d037469f75b073a28
 SHA1 (patch-.._vendor_wide-0.7.33_src_u64x2__.rs) = 6d779112842a67507cd2969aca55287fecbc3f24
-SHA1 (patch-.._vendor_wide-0.7.33_src_u8x16__.rs) = 72729f072dcf8bbf1524606cf066f82bdda6f15d
+SHA1 (patch-.._vendor_wide-0.7.33_src_u8x16__.rs) = 96375e175f8420af9bf2327114cb17ec10c438d7
 SHA1 (patch-.._vendor_zune-jpeg-0.5.13_src_idct.rs) = de42940dcbfd5fee44eb42c0315070b34726f05f
 SHA1 (patch-.._vendor_zune-jpeg-0.5.13_src_unsafe__utils.rs) = 0f6b93067186b4daf8f1fc32135d551f7fd72a84
 SHA1 (patch-.._vendor_zune-jpeg-0.5.13_src_unsafe__utils__neon.rs) = 201deb50af81144505a8316ddb5f9a3bcc2cc3e1

Index: pkgsrc/graphics/librsvg/patches/patch-.._vendor_wide-0.7.33_src_u8x16__.rs
diff -u pkgsrc/graphics/librsvg/patches/patch-.._vendor_wide-0.7.33_src_u8x16__.rs:1.1 pkgsrc/graphics/librsvg/patches/patch-.._vendor_wide-0.7.33_src_u8x16__.rs:1.2
--- pkgsrc/graphics/librsvg/patches/patch-.._vendor_wide-0.7.33_src_u8x16__.rs:1.1      Mon Dec  8 12:40:17 2025
+++ pkgsrc/graphics/librsvg/patches/patch-.._vendor_wide-0.7.33_src_u8x16__.rs  Sat Oct 24 19:12:37 2026
@@ -1,4 +1,4 @@
-$NetBSD: patch-.._vendor_wide-0.7.33_src_u8x16__.rs,v 1.1 2025/12/08 12:40:17 adam Exp $
+$NetBSD: patch-.._vendor_wide-0.7.33_src_u8x16__.rs,v 1.2 2026/10/24 19:12:37 he Exp $
 
 Do not try to use neon / SIMD in big-endian mode on aarch64.
 
@@ -112,3 +112,30 @@ Do not try to use neon / SIMD in big-end
          unsafe { Self { neon: vqsubq_u8(self.neon, rhs.neon) } }
        } else {
          Self { arr: [
+@@ -477,7 +477,7 @@ impl u8x16 {
+             u8x16 { sse: unpack_low_i8_m128i(lhs.sse, rhs.sse) }
+         } else if #[cfg(target_feature = "simd128")] {
+           u8x16 { simd: u8x16_shuffle::<0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23>(lhs.simd, rhs.simd) }
+-        } else if #[cfg(all(target_feature = "neon", target_arch = "aarch64"))] {
++        } else if #[cfg(all(target_feature = "neon", target_arch = "aarch64", target_endian = "little"))] {
+             let lhs = unsafe { vget_low_u8(lhs.neon) };
+             let rhs = unsafe { vget_low_u8(rhs.neon) };
+ 
+@@ -507,7 +507,7 @@ impl u8x16 {
+             u8x16 { sse: unpack_high_i8_m128i(lhs.sse, rhs.sse) }
+         } else if #[cfg(target_feature = "simd128")] {
+             u8x16 { simd: u8x16_shuffle::<8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31>(lhs.simd, rhs.simd) }
+-        } else if #[cfg(all(target_feature = "neon", target_arch = "aarch64"))] {
++        } else if #[cfg(all(target_feature = "neon", target_arch = "aarch64", target_endian = "little"))] {
+             let lhs = unsafe { vget_high_u8(lhs.neon) };
+             let rhs = unsafe { vget_high_u8(rhs.neon) };
+ 
+@@ -537,7 +537,7 @@ impl u8x16 {
+             u8x16 { sse: pack_i16_to_u8_m128i(lhs.sse, rhs.sse) }
+         } else if #[cfg(target_feature = "simd128")] {
+             u8x16 { simd: u8x16_narrow_i16x8(lhs.simd, rhs.simd) }
+-        } else if #[cfg(all(target_feature = "neon", target_arch = "aarch64"))] {
++        } else if #[cfg(all(target_feature = "neon", target_arch = "aarch64", target_endian = "little"))] {
+             let lhs = unsafe { vqmovun_s16(lhs.neon) };
+             let rhs = unsafe { vqmovun_s16(rhs.neon) };
+             u8x16 { neon: unsafe { vcombine_u8(lhs, rhs) } }