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CVS commit: pkgsrc/cad



Module Name:    pkgsrc
Committed By:   kamil
Date:           Sat Oct  8 14:18:22 UTC 2016

Modified Files:
        pkgsrc/cad: Makefile

Log Message:
Detach cad/verilog-current


To generate a diff of this commit:
cvs rdiff -u -r1.87 -r1.88 pkgsrc/cad/Makefile

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: pkgsrc/cad/Makefile
diff -u pkgsrc/cad/Makefile:1.87 pkgsrc/cad/Makefile:1.88
--- pkgsrc/cad/Makefile:1.87    Fri Sep 16 10:31:59 2016
+++ pkgsrc/cad/Makefile Sat Oct  8 14:18:22 2016
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.87 2016/09/16 10:31:59 wiz Exp $
+# $NetBSD: Makefile,v 1.88 2016/10/08 14:18:22 kamil Exp $
 #
 
 COMMENT=       CAD tools
@@ -63,7 +63,6 @@ SUBDIR+=      tkgate
 SUBDIR+=       tnt-mmtl
 SUBDIR+=       transcalc
 SUBDIR+=       verilog
-SUBDIR+=       verilog-current
 SUBDIR+=       verilog-mode
 SUBDIR+=       vipec
 SUBDIR+=       wcalc



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