Subject: CVS commit: pkgsrc/cad/verilog-current
To: None <pkgsrc-changes@NetBSD.org>
From: Matthias Drochner <drochner@netbsd.org>
List: pkgsrc-changes
Date: 08/25/2003 11:21:52
Module Name: pkgsrc
Committed By: drochner
Date: Mon Aug 25 11:21:51 UTC 2003
Modified Files:
pkgsrc/cad/verilog-current: Makefile distinfo
Log Message:
update to the 20030815 shapshot
changes are basically bugfixes, and improvements in the FPGA synthesis
area
To generate a diff of this commit:
cvs rdiff -r1.34 -r1.35 pkgsrc/cad/verilog-current/Makefile
cvs rdiff -r1.17 -r1.18 pkgsrc/cad/verilog-current/distinfo
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.