Subject: CVS commit: pkgsrc/cad/verilog-current
To: None <pkgsrc-changes@netbsd.org>
From: Dan McMahill <dmcmahill@netbsd.org>
List: pkgsrc-changes
Date: 02/04/2003 02:46:10
Module Name: pkgsrc
Committed By: dmcmahill
Date: Tue Feb 4 00:46:09 UTC 2003
Modified Files:
pkgsrc/cad/verilog-current: Makefile distinfo
pkgsrc/cad/verilog-current/patches: patch-ad
Log Message:
update to verilog-current-20030202.
This is the first packaged (in pkgsrc) snapshot after the verilog-0.7
release.
This snapshot adds preliminary support for real variables to the language
to the features already found in verilog-0.7.
To generate a diff of this commit:
cvs rdiff -r1.31 -r1.32 pkgsrc/cad/verilog-current/Makefile
cvs rdiff -r1.15 -r1.16 pkgsrc/cad/verilog-current/distinfo
cvs rdiff -r1.10 -r1.11 pkgsrc/cad/verilog-current/patches/patch-ad
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.