Module Name:	pkgsrc
Committed By:	dmcmahill
Date:		Sun Oct 13 23:01:27 UTC 2002

Modified Files:
	pkgsrc/cad/verilog-current: Makefile distinfo

Log Message:
update to verilog-current-20020921 snapshot.  Many improvemnts in the
synthesis code and bug fixes in the simulation code since the last
packaged snapshot.


To generate a diff of this commit:
cvs rdiff -r1.28 -r1.29 pkgsrc/cad/verilog-current/Makefile
cvs rdiff -r1.12 -r1.13 pkgsrc/cad/verilog-current/distinfo

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.