Re: kern/60144: virtio(4) cache coherence issue

["Tetsuya Isaki via gnats" <gnats-admin%NetBSD.org@localhost>]

The following reply was made to PR kern/60144; it has been noted by GNATS.

From: Tetsuya Isaki <isaki%pastel-flower.jp@localhost>
To: Taylor R Campbell <riastradh%NetBSD.org@localhost>
Cc: gnats-bugs%netbsd.org@localhost,
	kern-bug-people%netbsd.org@localhost,
	netbsd-bugs%netbsd.org@localhost
Subject: Re: kern/60144: virtio(4) cache coherence issue
Date: Thu, 28 May 2026 13:10:27 +0900

 At Sat, 23 May 2026 13:39:56 +0900,
 Tetsuya Isaki wrote:
 > > > virtio1: interrupting at gfpic4 irq 2 (IPL 5)
 > > > ld1: 8192 MB, 4161 cyl, 64 head, 63 sec, 512 bytes/sect x 16777216 sectors (0 bytes/physsect)
 > > > Spurious interrupt on CPU ipl 5
 > > 
 > > Just to confirm, is there anything else at gfpic4 irq 2 ipl 5, or is
 > > the interrupt definitely meant for, but not acknowledged by, virtio1?
 > 
 > Then I tested it under several conditions, and it might not be related
 > to ld@virtio1.  I'll take a look but separate it from this PR for now.
 
 I filed this as a separate issue, PR kern/60297
 "virtio(4) polling is not properly supported for MMIO".
 
 Thanks,
 ---
 Tetsuya Isaki <isaki%pastel-flower.jp@localhost / isaki%NetBSD.org@localhost>