Re: kern/57240: Missing store-before-store barriers in cpu_switchto on non-TSO MP platforms

[Taylor R Campbell <riastradh%NetBSD.org@localhost>]

The following reply was made to PR kern/57240; it has been noted by GNATS.

From: Taylor R Campbell <riastradh%NetBSD.org@localhost>
To: gnats-bugs%NetBSD.org@localhost
Cc: 
Subject: Re: kern/57240: Missing store-before-store barriers in cpu_switchto on non-TSO MP platforms
Date: Thu, 23 Feb 2023 10:54:08 +0000

 Another potential optimization:
 
 - If __HAVE_PREEMPTION is not defined, i.e., if there can be no kernel
   preemption, the barrier in cpu_switchto at (3) after setting
   ci->ci_curlwp can be omitted because any following mutex_exit always
   issues a (stronger) barrier and store nonpreemptibly (since
   everything in the kernel is nonpreemptible).
 
 However, this might break in the face of softints, which as far as I'm
 aware can preempt kernel threads even if non-softint threads can't
 preempt other kernel threads (and softints can hold adaptive mutexes
 so we can't just ignore them like we can ignore hard interrupts).