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Re: kern/54994: Critical bug in uarea_poolpage_alloc() for archs with __HAVE_CPU_UAREA_ROUTINES

Jason, Nick, thank you for your kind comments!

__HAVE_CPU_UAREA_ROUTINES is enabled for alpha, mips,
powerpc/{oae,ibm4xx,booke}, and riscv. I investigated whether it is
really necessary or not for these archs (except for riscv).

In short, most of these archs do *not* need direct-mapped physically
contiguous u-area for now, as far as I can see (source code reading
and experiment on powerpc/oea, just experiment on other archs). Only
the exception is powerpc/ibm4xx, which should also be fixed.

So is it time to retire __HAVE_CPU_UAREA_ROUTINES?


(1) powerpc

For powerpc architectures, MMU is turned off by hardware when exception
occurs. We need direct-mapped physically contiguous u-area, if we
manipulate kernel stack in trap handlers, before MMU is reenabled.

For powerpc/oea, external interruption handler used to do that. But it
was rewritten to manipulate stack after MMU is enabled, from
powerpc/trap_subr.S rev 1.67:

Actually, kernel works fine on macppc (Mac mini G4) even if
__HAVE_CPU_UAREA_ROUTINES is manually turned off; boots multiuser, and
builds pkgsrc/lang/perl5 for example.

For powerpc/ibm4xx, trap handlers are designed based on old powerpc/oea
implementation. And interruption handler still manipulates kernel stack
with MMU disabled. I thought it can be fixed mechanically, but something
goes wrong with softint_dispatch(). I will examine further.

For powerpc/booke, I'm not familiar to its architecture nor organization
of kernel source codes. So I turned __HAVE_CPU_UAREA_ROUTINES off to see
what happens. RB800 (MPC8544E) also boots multiuser and builds lang/perl5.

(2) alpha, mips

I'm also not familiar to these archs, so I did experiment to turn off

For alpha, DS10 (21264A) boots multiuser, and builds lang/perl5.

For mips, MobileGearII MC/R730 (VR4121; MIPS3 with ENABLE_MIPS_4KB_PAGE)
also boots multiuser. I am too lazy to build perl on this machine, but
hello world builds and runs at least :).

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