Re: port-sgimips/53520 (delay(9) is ineffective in early initializationphase sgimips kernel.)

[Izumi Tsutsui <tsutsui%ceres.dti.ne.jp@localhost>]

The following reply was made to PR port-sgimips/53520; it has been noted by GNATS.

From: Izumi Tsutsui <tsutsui%ceres.dti.ne.jp@localhost>
To: gnats-bugs%NetBSD.org@localhost
Cc: tsutsui%ceres.dti.ne.jp@localhost
Subject: Re: port-sgimips/53520 (delay(9) is ineffective in early initializationphase
	 sgimips kernel.)
Date: Sat, 8 Sep 2018 02:37:12 +0900

 > The basic analysis (temporary initialization of ci_divisor_delay for
 > early use of delay(9)) is reasonable.
 
 Note actual early calls of delay(9) are in sgimips/dev/int.c int_attach():
 
 ---
 	switch (mach_type) {
 	case MACH_SGI_IP6 | MACH_SGI_IP10:
 		/* Clean out interrupt masks */
 		bus_space_write_1(iot, ioh, INT1_LOCAL_MASK, 0);
 
 		/* Turn off timers and clear interrupts */
 		bus_space_write_1(iot, ioh, INT1_TIMER_CONTROL,
 		    (TIMER_SEL0 | TIMER_16BIT | TIMER_SWSTROBE));
 		bus_space_write_1(iot, ioh, INT1_TIMER_CONTROL,
 		    (TIMER_SEL1 | TIMER_16BIT | TIMER_SWSTROBE));
 		bus_space_write_1(iot, ioh, INT1_TIMER_CONTROL,
 		    (TIMER_SEL2 | TIMER_16BIT | TIMER_SWSTROBE));
 		wbflush();
 =>		delay(4);
 		bus_space_read_1(iot, ioh, INT1_TIMER_0_ACK);
 		bus_space_read_1(iot, ioh, INT1_TIMER_1_ACK);
 
 		platform.intr_establish = int1_intr_establish;
 		platform.intr1 = int1_local_intr;
 		platform.intr2 = int_8254_intr0;
 		platform.intr4 = int_8254_intr1;
 		int_8254_cal();
 		break;
 
 	case MACH_SGI_IP12:
 	case MACH_SGI_IP20:
 	case MACH_SGI_IP22:
 		/* Clean out interrupt masks */
 		bus_space_write_1(iot, ioh, INT2_LOCAL0_MASK, 0);
 		bus_space_write_1(iot, ioh, INT2_LOCAL1_MASK, 0);
 		bus_space_write_1(iot, ioh, INT2_MAP_MASK0, 0);
 		bus_space_write_1(iot, ioh, INT2_MAP_MASK1, 0);
 
 		/* Reset timer interrupts */
 		bus_space_write_1(iot, ioh, INT2_TIMER_CONTROL,
 		    (TIMER_SEL0 | TIMER_16BIT | TIMER_SWSTROBE));
 		bus_space_write_1(iot, ioh, INT2_TIMER_CONTROL,
 		    (TIMER_SEL1 | TIMER_16BIT | TIMER_SWSTROBE));
 		bus_space_write_1(iot, ioh, INT2_TIMER_CONTROL,
 		    (TIMER_SEL2 | TIMER_16BIT | TIMER_SWSTROBE));
 		wbflush();
 =>		delay(4);
 		bus_space_write_1(iot, ioh, INT2_TIMER_CLEAR, 0x03);
 
 		if (mach_type == MACH_SGI_IP12) {
 			platform.intr_establish = int2_intr_establish;
 			platform.intr1 = int2_local0_intr;
 			platform.intr2 = int2_local1_intr;
 			platform.intr3 = int_8254_intr0;
 			platform.intr4 = int_8254_intr1;
 			int_8254_cal();
 		} else {
 			platform.intr_establish = int2_intr_establish;
 			platform.intr0 = int2_local0_intr;
 			platform.intr1 = int2_local1_intr;
 #ifdef MIPS3
 			curcpu()->ci_cpu_freq = int2_cpu_freq(self);
 #endif
 		}
 		break;
 ---
 but it looks IP2x machines (MIPS3 Indy and Indigo2) works without
 this initialization (i.e. it doesn't require delay(9), or short delay
 by calling a function is enough?).
 
 Indigo R3k machines (IP6/10/12) are actually affected by
 too short delay(9) caused by this lack of initialization,
 according to report of Etomi-san (PR originator).
 
 ---
 Izumi Tsutsui