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PR/52966 CVS commit: src/sys/arch

The following reply was made to PR port-amd64/52966; it has been noted by GNATS.

From: "Maxime Villard" <>
Subject: PR/52966 CVS commit: src/sys/arch
Date: Thu, 14 Jun 2018 14:36:46 +0000

 Module Name:	src
 Committed By:	maxv
 Date:		Thu Jun 14 14:36:46 UTC 2018
 Modified Files:
 	src/sys/arch/amd64/amd64: locore.S
 	src/sys/arch/x86/include: cpu.h fpu.h
 	src/sys/arch/x86/x86: fpu.c x86_machdep.c
 Log Message:
 Add some code to support eager fpu switch, INTEL-SA-00145. We restore the
 FPU state of the lwp right away during context switches. This guarantees
 that when the CPU executes in userland, the FPU doesn't contain secrets.
 Maybe we also need to clear the FPU in setregs(), not sure about this one.
 Can be enabled/disabled via:
 	machdep.fpu_eager = {0/1}
 Not yet turned on automatically on affected CPUs (Intel Family 6).
 More generally it would be good to turn it on automatically when XSAVEOPT
 is supported, because in this case there is probably a non-negligible
 performance gain; but we need to fix PR/52966.
 To generate a diff of this commit:
 cvs rdiff -u -r1.165 -r1.166 src/sys/arch/amd64/amd64/locore.S
 cvs rdiff -u -r1.91 -r1.92 src/sys/arch/x86/include/cpu.h
 cvs rdiff -u -r1.8 -r1.9 src/sys/arch/x86/include/fpu.h
 cvs rdiff -u -r1.32 -r1.33 src/sys/arch/x86/x86/fpu.c
 cvs rdiff -u -r1.115 -r1.116 src/sys/arch/x86/x86/x86_machdep.c
 Please note that diffs are not public domain; they are subject to the
 copyright notices on the relevant files.

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