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Re: toolchain/48696: gcc crashes on loongson when optimizing
The following reply was made to PR toolchain/48696; it has been noted by GNATS.
From: Michael <macallan%netbsd.org@localhost>
To: gnats-bugs%NetBSD.org@localhost
Cc:
Subject: Re: toolchain/48696: gcc crashes on loongson when optimizing
Date: Thu, 10 Apr 2014 09:31:02 -0400
The crash comes from gmp, namely the mips64 .asm routines which
unconditionally use 64bit loads and stores, even with 32bit ABIs.
Using mips32 .asm seems to fix the problem ( see patch below ).
I don't think the patch is committable as is, we should probably
provide versions of the mips64 asm routines that use 32bit loads and
stores, since we still want to optimize for MIPS-III or better.
Index: lib/libgmp/arch/mips64el/Makefile.inc
===================================================================
RCS file:
/cvsroot/src/external/lgpl3/gmp/lib/libgmp/arch/mips64el/Makefile.inc,v
retrieving revision 1.5
diff -u -w -r1.5 Makefile.inc
--- lib/libgmp/arch/mips64el/Makefile.inc 4 Dec 2013 00:49:18 -0000
1.5
+++ lib/libgmp/arch/mips64el/Makefile.inc 10 Apr 2014 13:01:57 -0000
@@ -158,6 +158,8 @@
redc_n.c \
sub_err1_n.c \
+.if (defined(CPUFLAGS) && !empty(CPUFLAGS:M-mabi=64))
+GMP_LIMB_BITS=64
C_SRCS_LIST= \
xor_n.c mpn/generic/logops_n.c \
sb_div_r_sec.c mpn/generic/sb_div_sec.c \
@@ -185,10 +187,34 @@
addmul_1.asm mpn/mips64/addmul_1.asm \
sub_n.asm mpn/mips64/sub_n.asm \
-.if (defined(CPUFLAGS) && !empty(CPUFLAGS:M-mabi=64))
-GMP_LIMB_BITS=64
.else
GMP_LIMB_BITS=32
+C_SRCS_LIST= \
+ xor_n.c mpn/generic/logops_n.c \
+ sb_div_r_sec.c mpn/generic/sb_div_sec.c \
+ nand_n.c mpn/generic/logops_n.c \
+ nior_n.c mpn/generic/logops_n.c \
+ hamdist.c mpn/generic/popham.c \
+ popcount.c mpn/generic/popham.c \
+ sbpi1_div_qr_sec.c mpn/generic/sbpi1_div_sec.c \
+ and_n.c mpn/generic/logops_n.c \
+ ior_n.c mpn/generic/logops_n.c \
+ sb_div_qr_sec.c mpn/generic/sb_div_sec.c \
+ xnor_n.c mpn/generic/logops_n.c \
+ iorn_n.c mpn/generic/logops_n.c \
+ sbpi1_div_r_sec.c mpn/generic/sbpi1_div_sec.c \
+ andn_n.c mpn/generic/logops_n.c \
+
+ASM_SRCS_LIST= \
+ add_n.asm mpn/mips32/add_n.asm \
+ submul_1.asm mpn/mips32/submul_1.asm \
+ umul.asm mpn/mips32/umul.asm \
+ lshift.asm mpn/mips32/lshift.asm \
+ mul_1.asm mpn/mips32/mul_1.asm \
+ rshift.asm mpn/mips32/rshift.asm \
+ addmul_1.asm mpn/mips32/addmul_1.asm \
+ sub_n.asm mpn/mips32/sub_n.asm \
+
.endif
COPTS+= -Wno-error
Index: lib/libgmp/arch/mips64el/config.h
===================================================================
RCS file: /cvsroot/src/external/lgpl3/gmp/lib/libgmp/arch/mips64el/config.h,v
retrieving revision 1.4
diff -u -w -r1.4 config.h
--- lib/libgmp/arch/mips64el/config.h 29 Nov 2013 13:26:16 -0000 1.4
+++ lib/libgmp/arch/mips64el/config.h 10 Apr 2014 13:01:57 -0000
@@ -223,7 +223,11 @@
implementation of the corresponding routine exists. */
#define HAVE_NATIVE_mpn_add_n 1
/* #undef HAVE_NATIVE_mpn_add_n_sub_n */
+
+#ifdef _LP64
#define HAVE_NATIVE_mpn_add_nc 1
+#endif
+
/* #undef HAVE_NATIVE_mpn_addaddmul_1msb0 */
/* #undef HAVE_NATIVE_mpn_addcnd_n */
/* #undef HAVE_NATIVE_mpn_addlsh1_n */
@@ -310,10 +314,14 @@
/* #undef HAVE_NATIVE_mpn_rsh1sub_nc */
#define HAVE_NATIVE_mpn_rshift 1
/* #undef HAVE_NATIVE_mpn_sqr_basecase */
+#ifdef _LP64
#define HAVE_NATIVE_mpn_sqr_diagonal 1
+#endif
/* #undef HAVE_NATIVE_mpn_sqr_diag_addlsh1 */
#define HAVE_NATIVE_mpn_sub_n 1
+#ifdef _LP64
#define HAVE_NATIVE_mpn_sub_nc 1
+#endif
/* #undef HAVE_NATIVE_mpn_subcnd_n */
/* #undef HAVE_NATIVE_mpn_sublsh1_n */
/* #undef HAVE_NATIVE_mpn_sublsh2_n */
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