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PR/47016 CVS commit: src/sys/arch/x86/x86



The following reply was made to PR port-amd64/47016; it has been noted by GNATS.

From: "Chuck Silvers" <chs%netbsd.org@localhost>
To: gnats-bugs%gnats.NetBSD.org@localhost
Cc: 
Subject: PR/47016 CVS commit: src/sys/arch/x86/x86
Date: Wed, 3 Oct 2012 17:04:25 +0000

 Module Name:   src
 Committed By:  chs
 Date:          Wed Oct  3 17:04:25 UTC 2012
 
 Modified Files:
        src/sys/arch/x86/x86: mpacpi.c
 
 Log Message:
 as a workaround for PR 47016, call ioapic_reenable() at the end of
 ACPI interrupt routing to fix the settings for the SCI interrupt.
 the problem is that after my recent changes, the SCI handler is
 installed before the MADT info is parsed, so we don't know what
 polarity it should have.  the real fix for this will be to rearrange
 the ACPI initialization so that everything is done in a more sensible
 order, but that will take some more time.
 
 
 To generate a diff of this commit:
 cvs rdiff -u -r1.95 -r1.96 src/sys/arch/x86/x86/mpacpi.c
 
 Please note that diffs are not public domain; they are subject to the
 copyright notices on the relevant files.
 


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