Re: port-i386/41267: 5.0 RC4 does not detect second CPU in VIA VT-310DP motherboard

[christos%zoulas.com@localhost (Christos Zoulas)]

On Apr 29, 11:27pm, vezhlys%gmail.com@localhost (Andrius V) wrote:
-- Subject: Re: port-i386/41267: 5.0 RC4 does not detect second CPU in VIA VT

| I found the main problem for this bug. It is related to the patch made for
| PR40213. Changes itself were not bad but for some reason (cpu_feature[0] &
| CPUID_CX8) != 0 (x86_patch function in patch.c) returns false for this
| system (VIA Eden-N actually supports cmpxchg8b instruction). Because of
| this it uses i486 version of atomic_cas_64 function (atomic.S) and this is
| the place where it doesn't work. That code worked too until popf, pushf
| were added and that change broke the support (it was made for "Fix the i486
| atomic_cas_64() to not unconditionally enable interrupts.", if I am not
| wrong), because of this atomic_swap_64 goes into infinitive loop too (look
| at my earlier posts). The main question remains why pentium routine is not
| used how to solve that? Currently I commented this if clause (so the
| "patch" applied anyway) and system just booted fine with both CPUs. Any
| thoughts and suggestions? Thanks.

Can you try this patch? If it does not work, can you send me the cpuid output
for your processors (or add printf's and see why it does not)?

christos

Index: identcpu.c
===================================================================
RCS file: /cvsroot/src/sys/arch/x86/x86/identcpu.c,v
retrieving revision 1.30
diff -u -p -u -r1.30 identcpu.c
--- identcpu.c  23 Feb 2012 14:45:55 -0000      1.30
+++ identcpu.c  29 Apr 2012 22:26:32 -0000
@@ -380,13 +380,30 @@ static void
 cpu_probe_winchip(struct cpu_info *ci)
 {
 
-       if (cpu_vendor != CPUVENDOR_IDT ||
-           CPUID2FAMILY(ci->ci_signature) != 5)
+       if (cpu_vendor != CPUVENDOR_IDT)
                return;
 
-       if (CPUID2MODEL(ci->ci_signature) == 4) {
+       switch (CPUID2FAMILY(ci->ci_signature)) {
+       case 5:
                /* WinChip C6 */
-               ci->ci_feat_val[0] &= ~CPUID_TSC;
+               if (CPUID2MODEL(ci->ci_signature) == 4)
+                       ci->ci_feat_val[0] &= ~CPUID_TSC;
+               break;
+       case 6:
+               /*
+                * VIA Eden ESP 
+                *
+                * Quoting from page 3-4 of: "VIA Eden ESP Processor Datasheet"
+                * http://www.via.com.tw/download/mainboards/6/14/Eden20v115.pdf
+                * 
+                * 1. The CMPXCHG8B instruction is provided and always enabled,
+                *    however, it appears disabled in the corresponding CPUID
+                *    function bit 0 to avoid a bug in an early version of
+                *    Windows NT. However, this default can be changed via a
+                *    bit in the FCR MSR.
+                */
+               ci->ci_feat_val[0] |= CPUID_CX8;
+               break;
        }
 }